[ar7] use the righ value in the DSP clock calculation

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11123 3c298f89-4303-0410-b956-a3cf2f4a3e73

diff --git a/target/linux/ar7/files/arch/mips/ar7/clock.c b/target/linux/ar7/files/arch/mips/ar7/clock.c
index ff4b5816e72649c434f4a8405eb257469eca38df..25e6b7326c391eac75662363852faece3e4effc2 100644 (file)
--- a/target/linux/ar7/files/arch/mips/ar7/clock.c
+++ b/target/linux/ar7/files/arch/mips/ar7/clock.c
@@ -437,7 +437,7 @@ static void __init tnetd7200_init_clocks(void)
                        printk(KERN_INFO "Clocks: Sync 1:1 mode\n");
 
                        printk(KERN_INFO "Clocks: Setting DSP clock\n");
-                       calculate(dsp_base, TNETD7200_DEF_CPU_CLK, &dsp_prediv,
+                       calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv,
                                &dsp_postdiv, &dsp_mul);
                        ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul)
                                                                / dsp_postdiv;