d798070fde4e473259445aab0737cf149a4d1bd0
[openwrt-10.03/.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-tl-wr841n.c
1 /*
2  *  TP-LINK TL-WR841N board support
3  *
4  *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
5  *
6  *  This program is free software; you can redistribute it and/or modify it
7  *  under the terms of the GNU General Public License version 2 as published
8  *  by the Free Software Foundation.
9  */
10
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/input.h>
15
16 #include <asm/mips_machine.h>
17 #include <asm/mach-ar71xx/ar71xx.h>
18 #include <asm/mach-ar71xx/pci.h>
19
20 #include "devices.h"
21 #include "dev-m25p80.h"
22 #include "dev-ar913x-wmac.h"
23
24 #define TL_WR841ND_V1_GPIO_LED_SYSTEM           2
25 #define TL_WR841ND_V1_GPIO_LED_QSS_GREEN        4
26 #define TL_WR841ND_V1_GPIO_LED_QSS_RED          5
27
28 #define TL_WR841ND_V1_GPIO_BTN_RESET    3
29 #define TL_WR841ND_V1_GPIO_BTN_QSS      7
30
31 #define TL_WR841ND_V1_BUTTONS_POLL_INTERVAL     20
32
33 #ifdef CONFIG_MTD_PARTITIONS
34 static struct mtd_partition tl_wr841n_v1_partitions[] = {
35         {
36                 .name           = "redboot",
37                 .offset         = 0,
38                 .size           = 0x020000,
39                 .mask_flags     = MTD_WRITEABLE,
40         } , {
41                 .name           = "kernel",
42                 .offset         = 0x020000,
43                 .size           = 0x140000,
44         } , {
45                 .name           = "rootfs",
46                 .offset         = 0x160000,
47                 .size           = 0x280000,
48         } , {
49                 .name           = "config",
50                 .offset         = 0x3e0000,
51                 .size           = 0x020000,
52                 .mask_flags     = MTD_WRITEABLE,
53         } , {
54                 .name           = "firmware",
55                 .offset         = 0x020000,
56                 .size           = 0x3c0000,
57         }
58 };
59 #endif /* CONFIG_MTD_PARTITIONS */
60
61 static struct flash_platform_data tl_wr841n_v1_flash_data = {
62 #ifdef CONFIG_MTD_PARTITIONS
63         .parts          = tl_wr841n_v1_partitions,
64         .nr_parts       = ARRAY_SIZE(tl_wr841n_v1_partitions),
65 #endif
66 };
67
68 static struct ar71xx_pci_irq tl_wr841n_v1_pci_irqs[] __initdata = {
69         {
70                 .slot   = 0,
71                 .pin    = 1,
72                 .irq    = AR71XX_PCI_IRQ_DEV0,
73         }, {
74                 .slot   = 1,
75                 .pin    = 1,
76                 .irq    = AR71XX_PCI_IRQ_DEV1,
77         }, {
78                 .slot   = 2,
79                 .pin    = 1,
80                 .irq    = AR71XX_PCI_IRQ_DEV2,
81         }
82 };
83
84 static struct gpio_led tl_wr841n_v1_leds_gpio[] __initdata = {
85         {
86                 .name           = "tl-wr841n:green:system",
87                 .gpio           = TL_WR841ND_V1_GPIO_LED_SYSTEM,
88                 .active_low     = 1,
89         }, {
90                 .name           = "tl-wr841n:red:qss",
91                 .gpio           = TL_WR841ND_V1_GPIO_LED_QSS_RED,
92         }, {
93                 .name           = "tl-wr841n:green:qss",
94                 .gpio           = TL_WR841ND_V1_GPIO_LED_QSS_GREEN,
95         }
96 };
97
98 static struct gpio_button tl_wr841n_v1_gpio_buttons[] __initdata = {
99         {
100                 .desc           = "reset",
101                 .type           = EV_KEY,
102                 .code           = BTN_0,
103                 .threshold      = 5,
104                 .gpio           = TL_WR841ND_V1_GPIO_BTN_RESET,
105                 .active_low     = 1,
106         }, {
107                 .desc           = "qss",
108                 .type           = EV_KEY,
109                 .code           = BTN_1,
110                 .threshold      = 5,
111                 .gpio           = TL_WR841ND_V1_GPIO_BTN_QSS,
112                 .active_low     = 1,
113         }
114 };
115
116 static struct dsa_chip_data tl_wr841n_v1_dsa_chip = {
117         .port_names[0]  = "wan",
118         .port_names[1]  = "lan1",
119         .port_names[2]  = "lan2",
120         .port_names[3]  = "lan3",
121         .port_names[4]  = "lan4",
122         .port_names[5]  = "cpu",
123 };
124
125 static struct dsa_platform_data tl_wr841n_v1_dsa_data = {
126         .nr_chips       = 1,
127         .chip           = &tl_wr841n_v1_dsa_chip,
128 };
129
130 static void __init tl_wr841n_v1_setup(void)
131 {
132         u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
133
134         ar71xx_set_mac_base(mac);
135
136         ar71xx_add_device_mdio(0x0);
137
138         ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
139         ar71xx_eth0_data.phy_mask = 0x0;
140         ar71xx_eth0_data.speed = SPEED_100;
141         ar71xx_eth0_data.duplex = DUPLEX_FULL;
142
143         ar71xx_add_device_eth(0);
144
145         ar71xx_add_device_dsa(0, &tl_wr841n_v1_dsa_data);
146
147         ar71xx_add_device_m25p80(&tl_wr841n_v1_flash_data);
148
149         ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v1_leds_gpio),
150                                         tl_wr841n_v1_leds_gpio);
151
152         ar71xx_add_device_gpio_buttons(-1, TL_WR841ND_V1_BUTTONS_POLL_INTERVAL,
153                                         ARRAY_SIZE(tl_wr841n_v1_gpio_buttons),
154                                         tl_wr841n_v1_gpio_buttons);
155
156         ar71xx_pci_init(ARRAY_SIZE(tl_wr841n_v1_pci_irqs),
157                         tl_wr841n_v1_pci_irqs);
158 }
159
160 MIPS_MACHINE(AR71XX_MACH_TL_WR841N_V1, "TP-LINK TL-WR841N v1",
161              tl_wr841n_v1_setup);