2 * Atheros AP94 reference board PCI initialization
4 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/pci.h>
12 #include <linux/ath9k_platform.h>
13 #include <linux/delay.h>
15 #include <asm/mach-ar71xx/ar71xx.h>
16 #include <asm/mach-ar71xx/pci.h>
18 #include "dev-ap94-pci.h"
20 static struct ath9k_platform_data ap94_wmac0_data = {
23 static struct ath9k_platform_data ap94_wmac1_data = {
26 static char ap94_wmac0_mac[6];
27 static char ap94_wmac1_mac[6];
28 static int ap94_pci_fixup_enabled;
30 static struct ar71xx_pci_irq ap94_pci_irqs[] __initdata = {
34 .irq = AR71XX_PCI_IRQ_DEV0,
38 .irq = AR71XX_PCI_IRQ_DEV1,
42 static int ap94_pci_plat_dev_init(struct pci_dev *dev)
44 switch(PCI_SLOT(dev->devfn)) {
46 dev->dev.platform_data = &ap94_wmac0_data;
50 dev->dev.platform_data = &ap94_wmac1_data;
57 static void ap94_pci_fixup(struct pci_dev *dev)
65 if (!ap94_pci_fixup_enabled)
68 switch (PCI_SLOT(dev->devfn)) {
70 cal_data = ap94_wmac0_data.eeprom_data;
73 cal_data = ap94_wmac1_data.eeprom_data;
79 if (*cal_data != 0xa55a) {
80 printk(KERN_ERR "PCI: no calibration data found for %s\n",
85 mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
87 printk(KERN_ERR "PCI: ioremap error for device %s\n",
92 printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
94 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
96 /* Setup the PCI device to allow access to the internal registers */
97 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, AR71XX_PCI_MEM_BASE);
98 pci_read_config_word(dev, PCI_COMMAND, &cmd);
99 cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
100 pci_write_config_word(dev, PCI_COMMAND, cmd);
102 /* set pointer to first reg address */
104 while (*cal_data != 0xffff) {
108 val |= (*cal_data++) << 16;
110 __raw_writel(val, mem + reg);
114 pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
115 dev->vendor = val & 0xffff;
116 dev->device = (val >> 16) & 0xffff;
118 pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
119 dev->revision = val & 0xff;
120 dev->class = val >> 8; /* upper 3 bytes */
122 pci_read_config_word(dev, PCI_COMMAND, &cmd);
123 cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
124 pci_write_config_word(dev, PCI_COMMAND, cmd);
126 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
130 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ap94_pci_fixup);
132 void __init ap94_pci_enable_quirk_wndr3700(void)
134 /* WNDR3700 uses GPIO 6-9 for antenna configuration */
136 ap94_wmac0_data.led_pin = 5;
137 ap94_wmac0_data.gpio_mask = (0xf << 6);
138 /* 2.4 GHz uses the first fixed antenna group (0, 1, 0, 1) */
139 ap94_wmac0_data.gpio_val = (10 << 6);
141 ap94_wmac1_data.led_pin = 5;
142 ap94_wmac1_data.gpio_mask = (0xf << 6);
143 /* 5 GHz uses the second fixed antenna group (0, 1, 1, 0) */
144 ap94_wmac1_data.gpio_val = (6 << 6);
147 void __init ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
148 u8 *cal_data1, u8 *mac_addr1)
151 memcpy(ap94_wmac0_data.eeprom_data, cal_data0,
152 sizeof(ap94_wmac0_data.eeprom_data));
155 memcpy(ap94_wmac1_data.eeprom_data, cal_data1,
156 sizeof(ap94_wmac1_data.eeprom_data));
159 memcpy(ap94_wmac0_mac, mac_addr0, sizeof(ap94_wmac0_mac));
160 ap94_wmac0_data.macaddr = ap94_wmac0_mac;
164 memcpy(ap94_wmac1_mac, mac_addr1, sizeof(ap94_wmac1_mac));
165 ap94_wmac1_data.macaddr = ap94_wmac1_mac;
168 ar71xx_pci_plat_dev_init = ap94_pci_plat_dev_init;
169 ar71xx_pci_init(ARRAY_SIZE(ap94_pci_irqs), ap94_pci_irqs);
171 ap94_pci_fixup_enabled = 1;