package/mac80211/patches/467-ath5k_optimize_rx_status.patch

   1 --- a/drivers/net/wireless/ath/ath5k/desc.c
   2 +++ b/drivers/net/wireless/ath/ath5k/desc.c
   3 @@ -603,37 +603,37 @@ static int ath5k_hw_proc_5212_rx_status(
   4                                         struct ath5k_rx_status *rs)
   5  {
   6         struct ath5k_hw_rx_status *rx_status;
   7 +       u32 rxstat0, rxstat1;
   8
   9         rx_status = &desc->ud.ds_rx.rx_stat;
  10 +       rxstat1 = ACCESS_ONCE(rx_status->rx_status_1);
  11
  12         /* No frame received / not ready */
  13 -       if (unlikely(!(rx_status->rx_status_1 &
  14 -                               AR5K_5212_RX_DESC_STATUS1_DONE)))
  15 +       if (unlikely(!(rxstat1 & AR5K_5212_RX_DESC_STATUS1_DONE)))
  16                 return -EINPROGRESS;
  17
  18         memset(rs, 0, sizeof(struct ath5k_rx_status));
  19 +       rxstat0 = ACCESS_ONCE(rx_status->rx_status_0);
  20
  21         /*
  22          * Frame receive status
  23          */
  24 -       rs->rs_datalen = rx_status->rx_status_0 &
  25 -               AR5K_5212_RX_DESC_STATUS0_DATA_LEN;
  26 -       rs->rs_rssi = AR5K_REG_MS(rx_status->rx_status_0,
  27 +       rs->rs_datalen = rxstat0 & AR5K_5212_RX_DESC_STATUS0_DATA_LEN;
  28 +       rs->rs_rssi = AR5K_REG_MS(rxstat0,
  29                 AR5K_5212_RX_DESC_STATUS0_RECEIVE_SIGNAL);
  30 -       rs->rs_rate = AR5K_REG_MS(rx_status->rx_status_0,
  31 +       rs->rs_rate = AR5K_REG_MS(rxstat0,
  32                 AR5K_5212_RX_DESC_STATUS0_RECEIVE_RATE);
  33 -       rs->rs_antenna = AR5K_REG_MS(rx_status->rx_status_0,
  34 +       rs->rs_antenna = AR5K_REG_MS(rxstat0,
  35                 AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA);
  36 -       rs->rs_more = !!(rx_status->rx_status_0 &
  37 -               AR5K_5212_RX_DESC_STATUS0_MORE);
  38 -       rs->rs_tstamp = AR5K_REG_MS(rx_status->rx_status_1,
  39 +       rs->rs_more = !!(rxstat0 & AR5K_5212_RX_DESC_STATUS0_MORE);
  40 +       rs->rs_tstamp = AR5K_REG_MS(rxstat1,
  41                 AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP);
  42
  43         /*
  44          * Key table status
  45          */
  46 -       if (rx_status->rx_status_1 & AR5K_5212_RX_DESC_STATUS1_KEY_INDEX_VALID)
  47 -               rs->rs_keyix = AR5K_REG_MS(rx_status->rx_status_1,
  48 +       if (rxstat1 & AR5K_5212_RX_DESC_STATUS1_KEY_INDEX_VALID)
  49 +               rs->rs_keyix = AR5K_REG_MS(rxstat1,
  50                                            AR5K_5212_RX_DESC_STATUS1_KEY_INDEX);
  51         else
  52                 rs->rs_keyix = AR5K_RXKEYIX_INVALID;
  53 @@ -641,27 +641,22 @@ static int ath5k_hw_proc_5212_rx_status(
  54         /*
  55          * Receive/descriptor errors
  56          */
  57 -       if (!(rx_status->rx_status_1 &
  58 -           AR5K_5212_RX_DESC_STATUS1_FRAME_RECEIVE_OK)) {
  59 -               if (rx_status->rx_status_1 &
  60 -                               AR5K_5212_RX_DESC_STATUS1_CRC_ERROR)
  61 +       if (!(rxstat1 & AR5K_5212_RX_DESC_STATUS1_FRAME_RECEIVE_OK)) {
  62 +               if (rxstat1 & AR5K_5212_RX_DESC_STATUS1_CRC_ERROR)
  63                         rs->rs_status |= AR5K_RXERR_CRC;
  64
  65 -               if (rx_status->rx_status_1 &
  66 -                               AR5K_5212_RX_DESC_STATUS1_PHY_ERROR) {
  67 +               if (rxstat1 & AR5K_5212_RX_DESC_STATUS1_PHY_ERROR) {
  68                         rs->rs_status |= AR5K_RXERR_PHY;
  69 -                       rs->rs_phyerr = AR5K_REG_MS(rx_status->rx_status_1,
  70 +                       rs->rs_phyerr = AR5K_REG_MS(rxstat1,
  71                                 AR5K_5212_RX_DESC_STATUS1_PHY_ERROR_CODE);
  72                         if (!ah->ah_capabilities.cap_has_phyerr_counters)
  73                                 ath5k_ani_phy_error_report(ah, rs->rs_phyerr);
  74                 }
  75
  76 -               if (rx_status->rx_status_1 &
  77 -                               AR5K_5212_RX_DESC_STATUS1_DECRYPT_CRC_ERROR)
  78 +               if (rxstat1 & AR5K_5212_RX_DESC_STATUS1_DECRYPT_CRC_ERROR)
  79                         rs->rs_status |= AR5K_RXERR_DECRYPT;
  80
  81 -               if (rx_status->rx_status_1 &
  82 -                               AR5K_5212_RX_DESC_STATUS1_MIC_ERROR)
  83 +               if (rxstat1 & AR5K_5212_RX_DESC_STATUS1_MIC_ERROR)
  84                         rs->rs_status |= AR5K_RXERR_MIC;
  85         }
  86         return 0;