10 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
16 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
17 #define sbh bcm947xx_sbh
18 #define sbh_lock bcm947xx_sbh_lock
21 #define EXTIF_ADDR 0x1f000000
22 #define EXTIF_UART (EXTIF_ADDR + 0x00800000)
24 #define GPIO_TYPE_NORMAL (0x0 << 24)
25 #define GPIO_TYPE_EXTIF (0x1 << 24)
26 #define GPIO_TYPE_MASK (0xf << 24)
29 extern spinlock_t sbh_lock;
31 #define gpio_in() sb_gpioin(sbh)
32 #define gpio_out(mask, value) sb_gpioout(sbh, mask, ((value) & (mask)), GPIO_DRV_PRIORITY)
33 #define gpio_outen(mask, value) sb_gpioouten(sbh, mask, value, GPIO_DRV_PRIORITY)
34 #define gpio_control(mask, value) sb_gpiocontrol(sbh, mask, value, GPIO_DRV_PRIORITY)
35 #define gpio_intmask(mask, value) sb_gpiointmask(sbh, mask, value, GPIO_DRV_PRIORITY)
36 #define gpio_intpolarity(mask, value) sb_gpiointpolarity(sbh, mask, value, GPIO_DRV_PRIORITY)
38 static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, struct pt_regs *))
45 spin_lock_irqsave(sbh_lock, flags);
46 coreidx = sb_coreidx(sbh);
48 irq = sb_irq(sbh) + 2;
50 request_irq(irq, handler, SA_SHIRQ | SA_SAMPLE_RANDOM, "gpio", handler);
52 free_irq(irq, handler);
54 if ((cc = sb_setcore(sbh, SB_CC, 0))) {
57 intmask = readl(&cc->intmask);
62 writel(intmask, &cc->intmask);
64 sb_setcoreidx(sbh, coreidx);
65 spin_unlock_irqrestore(sbh_lock, flags);
68 static inline void gpio_set_extif(int gpio, int value)
70 volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK);