From bb9aaba0ad1452b6d455c4a981cd08628101e24f Mon Sep 17 00:00:00 2001 From: acoul Date: Thu, 31 Mar 2016 07:48:11 +0300 Subject: [PATCH] linux/ar71xx: sync kernel 3.18 patches to .29 --- ...-at803x-allow-to-configure-via-pdata.patch | 180 ------------------ .../902-unaligned_access_hacks.patch | 14 +- .../ar71xx/patches-3.18/999_led_fix.patch | 54 ++++++ .../patches-3.18/999_napi_alloc_frag.patch | 13 ++ .../patches-3.18/999_remove_QCA956X.patch | 135 +++++++++++++ 5 files changed, 210 insertions(+), 186 deletions(-) delete mode 100644 target/linux/ar71xx/patches-3.18/425-net-phy-at803x-allow-to-configure-via-pdata.patch create mode 100644 target/linux/ar71xx/patches-3.18/999_led_fix.patch create mode 100644 target/linux/ar71xx/patches-3.18/999_napi_alloc_frag.patch create mode 100644 target/linux/ar71xx/patches-3.18/999_remove_QCA956X.patch diff --git a/target/linux/ar71xx/patches-3.18/425-net-phy-at803x-allow-to-configure-via-pdata.patch b/target/linux/ar71xx/patches-3.18/425-net-phy-at803x-allow-to-configure-via-pdata.patch deleted file mode 100644 index 0d021ac7bd..0000000000 --- a/target/linux/ar71xx/patches-3.18/425-net-phy-at803x-allow-to-configure-via-pdata.patch +++ /dev/null @@ -1,180 +0,0 @@ ---- a/drivers/net/phy/at803x.c -+++ b/drivers/net/phy/at803x.c -@@ -12,12 +12,14 @@ - */ - - #include -+#include - #include - #include - #include - #include - #include - #include -+#include - - #define AT803X_INTR_ENABLE 0x12 - #define AT803X_INTR_STATUS 0x13 -@@ -34,8 +36,16 @@ - #define AT803X_INER 0x0012 - #define AT803X_INER_INIT 0xec00 - #define AT803X_INSR 0x0013 -+ -+#define AT803X_PCS_SMART_EEE_CTRL3 0x805D -+#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_MASK 0x3 -+#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT 12 -+#define AT803X_SMART_EEE_CTRL3_LPI_EN BIT(8) -+ - #define AT803X_DEBUG_ADDR 0x1D - #define AT803X_DEBUG_DATA 0x1E -+#define AT803X_DBG0_REG 0x00 -+#define AT803X_DEBUG_RGMII_RX_CLK_DLY BIT(8) - #define AT803X_DEBUG_SYSTEM_MODE_CTRL 0x05 - #define AT803X_DEBUG_RGMII_TX_CLK_DLY BIT(8) - -@@ -50,6 +60,7 @@ MODULE_LICENSE("GPL"); - struct at803x_priv { - bool phy_reset:1; - struct gpio_desc *gpiod_reset; -+ int prev_speed; - }; - - struct at803x_context { -@@ -61,6 +72,43 @@ struct at803x_context { - u16 led_control; - }; - -+static u16 -+at803x_dbg_reg_rmw(struct phy_device *phydev, u16 reg, u16 clear, u16 set) -+{ -+ struct mii_bus *bus = phydev->bus; -+ int val; -+ -+ mutex_lock(&bus->mdio_lock); -+ -+ bus->write(bus, phydev->addr, AT803X_DEBUG_ADDR, reg); -+ val = bus->read(bus, phydev->addr, AT803X_DEBUG_DATA); -+ if (val < 0) { -+ val = 0xffff; -+ goto out; -+ } -+ -+ val &= ~clear; -+ val |= set; -+ bus->write(bus, phydev->addr, AT803X_DEBUG_DATA, val); -+ -+out: -+ mutex_unlock(&bus->mdio_lock); -+ return val; -+} -+ -+static inline void -+at803x_dbg_reg_set(struct phy_device *phydev, u16 reg, u16 set) -+{ -+ at803x_dbg_reg_rmw(phydev, reg, 0, set); -+} -+ -+static inline void -+at803x_dbg_reg_clr(struct phy_device *phydev, u16 reg, u16 clear) -+{ -+ at803x_dbg_reg_rmw(phydev, reg, clear, 0); -+} -+ -+ - /* save relevant PHY registers to private copy */ - static void at803x_context_save(struct phy_device *phydev, - struct at803x_context *context) -@@ -208,8 +256,16 @@ static int at803x_probe(struct phy_devic - return 0; - } - -+static void at803x_disable_smarteee(struct phy_device *phydev) -+{ -+ phy_write_mmd(phydev, MDIO_MMD_PCS, AT803X_PCS_SMART_EEE_CTRL3, -+ 1 << AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT); -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0); -+} -+ - static int at803x_config_init(struct phy_device *phydev) - { -+ struct at803x_platform_data *pdata; - int ret; - - ret = genphy_config_init(phydev); -@@ -227,6 +283,26 @@ static int at803x_config_init(struct phy - return ret; - } - -+ pdata = dev_get_platdata(&phydev->dev); -+ if (pdata) { -+ if (pdata->disable_smarteee) -+ at803x_disable_smarteee(phydev); -+ -+ if (pdata->enable_rgmii_rx_delay) -+ at803x_dbg_reg_set(phydev, AT803X_DBG0_REG, -+ AT803X_DEBUG_RGMII_RX_CLK_DLY); -+ else -+ at803x_dbg_reg_clr(phydev, AT803X_DBG0_REG, -+ AT803X_DEBUG_RGMII_RX_CLK_DLY); -+ -+ if (pdata->enable_rgmii_tx_delay) -+ at803x_dbg_reg_set(phydev, AT803X_DEBUG_SYSTEM_MODE_CTRL, -+ AT803X_DEBUG_RGMII_TX_CLK_DLY); -+ else -+ at803x_dbg_reg_clr(phydev, AT803X_DEBUG_SYSTEM_MODE_CTRL, -+ AT803X_DEBUG_RGMII_TX_CLK_DLY); -+ } -+ - return 0; - } - -@@ -258,6 +334,8 @@ static int at803x_config_intr(struct phy - static void at803x_link_change_notify(struct phy_device *phydev) - { - struct at803x_priv *priv = phydev->priv; -+ struct at803x_platform_data *pdata; -+ pdata = dev_get_platdata(&phydev->dev); - - /* - * Conduct a hardware reset for AT8030 every time a link loss is -@@ -288,6 +366,26 @@ static void at803x_link_change_notify(st - priv->phy_reset = false; - } - } -+ if (pdata && pdata->fixup_rgmii_tx_delay && -+ phydev->speed != priv->prev_speed) { -+ switch (phydev->speed) { -+ case SPEED_10: -+ case SPEED_100: -+ at803x_dbg_reg_set(phydev, -+ AT803X_DEBUG_SYSTEM_MODE_CTRL, -+ AT803X_DEBUG_RGMII_TX_CLK_DLY); -+ break; -+ case SPEED_1000: -+ at803x_dbg_reg_clr(phydev, -+ AT803X_DEBUG_SYSTEM_MODE_CTRL, -+ AT803X_DEBUG_RGMII_TX_CLK_DLY); -+ break; -+ default: -+ break; -+ } -+ -+ priv->prev_speed = phydev->speed; -+ } - } - - static struct phy_driver at803x_driver[] = { ---- /dev/null -+++ b/include/linux/platform_data/phy-at803x.h -@@ -0,0 +1,11 @@ -+#ifndef _PHY_AT803X_PDATA_H -+#define _PHY_AT803X_PDATA_H -+ -+struct at803x_platform_data { -+ int disable_smarteee:1; -+ int enable_rgmii_tx_delay:1; -+ int enable_rgmii_rx_delay:1; -+ int fixup_rgmii_tx_delay:1; -+}; -+ -+#endif /* _PHY_AT803X_PDATA_H */ diff --git a/target/linux/ar71xx/patches-3.18/902-unaligned_access_hacks.patch b/target/linux/ar71xx/patches-3.18/902-unaligned_access_hacks.patch index b898ce9e6d..64c6695bca 100644 --- a/target/linux/ar71xx/patches-3.18/902-unaligned_access_hacks.patch +++ b/target/linux/ar71xx/patches-3.18/902-unaligned_access_hacks.patch @@ -637,14 +637,16 @@ #include --- a/include/net/inet_ecn.h +++ b/include/net/inet_ecn.h -@@ -115,13 +115,13 @@ static inline int IP6_ECN_set_ce(struct - { +@@ -124,7 +124,7 @@ static inline int IP6_ECN_set_ce(struct if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) return 0; -- *(__be32*)iph |= htonl(INET_ECN_CE << 20); -+ net_hdr_word(iph) |= htonl(INET_ECN_CE << 20); - return 1; - } + +- from = *(__be32 *)iph; ++ from = net_hdr_word(iph); + to = from | htonl(INET_ECN_CE << 20); + *(__be32 *)iph = to; + if (skb->ip_summed == CHECKSUM_COMPLETE) +@@ -134,7 +134,7 @@ static inline int IP6_ECN_set_ce(struct static inline void IP6_ECN_clear(struct ipv6hdr *iph) { diff --git a/target/linux/ar71xx/patches-3.18/999_led_fix.patch b/target/linux/ar71xx/patches-3.18/999_led_fix.patch new file mode 100644 index 0000000000..39c9da2c8f --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/999_led_fix.patch @@ -0,0 +1,54 @@ +--- a/arch/mips/ath79/mach-rb4xx.c ++++ b/arch/mips/ath79/mach-rb4xx.c +@@ -26,7 +26,9 @@ + #include "common.h" + #include "dev-eth.h" + #include "dev-gpio-buttons.h" ++#ifdef CONFIG_NEW_LEDS + #include "dev-leds-gpio.h" ++#endif /* CONFIG_NEW_LEDS */ + #include "dev-usb.h" + #include "machtypes.h" + #include "pci.h" +@@ -44,6 +46,7 @@ + #define RB4XX_KEYS_POLL_INTERVAL 20 /* msecs */ + #define RB4XX_KEYS_DEBOUNCE_INTERVAL (3 * RB4XX_KEYS_POLL_INTERVAL) + ++#ifdef CONFIG_NEW_LEDS + static struct gpio_led rb4xx_leds_gpio[] __initdata = { + { + .name = "rb4xx:yellow:user", +@@ -71,6 +74,7 @@ static struct gpio_led rb4xx_leds_gpio[] + .active_low = 0, + }, + }; ++#endif /* CONFIG_NEW_LEDS */ + + static struct gpio_keys_button rb4xx_gpio_keys[] __initdata = { + { +@@ -223,10 +227,10 @@ static void __init rb4xx_generic_setup(v + { + ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | + AR71XX_GPIO_FUNC_SPI_CS2_EN); +- ++#ifdef CONFIG_NEW_LEDS + ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), + rb4xx_leds_gpio); +- ++#endif /* CONFIG_NEW_LEDS */ + ath79_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL, + ARRAY_SIZE(rb4xx_gpio_keys), + rb4xx_gpio_keys); +@@ -424,10 +428,10 @@ static void __init rb493g_setup(void) + { + ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | + AR71XX_GPIO_FUNC_SPI_CS2_EN); +- ++#ifdef CONFIG_NEW_LEDS + ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), + rb4xx_leds_gpio); +- ++#endif /* CONFIG_NEW_LEDS */ + spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); + spi_register_board_info(rb4xx_microsd_info, + ARRAY_SIZE(rb4xx_microsd_info)); diff --git a/target/linux/ar71xx/patches-3.18/999_napi_alloc_frag.patch b/target/linux/ar71xx/patches-3.18/999_napi_alloc_frag.patch new file mode 100644 index 0000000000..32e72be9ca --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/999_napi_alloc_frag.patch @@ -0,0 +1,13 @@ +--- a/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c ++++ b/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +@@ -13,6 +13,10 @@ + + #include "ag71xx.h" + ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0) ++#define napi_alloc_frag netdev_alloc_frag ++#endif ++ + #if LINUX_VERSION_CODE < KERNEL_VERSION(4,2,0) + static inline void skb_free_frag(void *data) + { diff --git a/target/linux/ar71xx/patches-3.18/999_remove_QCA956X.patch b/target/linux/ar71xx/patches-3.18/999_remove_QCA956X.patch new file mode 100644 index 0000000000..d242819532 --- /dev/null +++ b/target/linux/ar71xx/patches-3.18/999_remove_QCA956X.patch @@ -0,0 +1,135 @@ +--- a/arch/mips/ath79/dev-eth.c ++++ b/arch/mips/ath79/dev-eth.c +@@ -183,8 +183,7 @@ void __init ath79_register_mdio(unsigned + ath79_soc == ATH79_SOC_AR9342 || + ath79_soc == ATH79_SOC_AR9344 || + ath79_soc == ATH79_SOC_QCA9556 || +- ath79_soc == ATH79_SOC_QCA9558 || +- ath79_soc == ATH79_SOC_QCA956X) ++ ath79_soc == ATH79_SOC_QCA9558) + max_id = 1; + else + max_id = 0; +@@ -209,7 +208,6 @@ void __init ath79_register_mdio(unsigned + case ATH79_SOC_AR9344: + case ATH79_SOC_QCA9556: + case ATH79_SOC_QCA9558: +- case ATH79_SOC_QCA956X: + if (id == 0) { + mdio_dev = &ath79_mdio0_device; + mdio_data = &ath79_mdio0_data; +@@ -268,12 +266,6 @@ void __init ath79_register_mdio(unsigned + mdio_data->is_ar934x = 1; + break; + +- case ATH79_SOC_QCA956X: +- if (id == 1) +- mdio_data->builtin_switch = 1; +- mdio_data->is_ar934x = 1; +- break; +- + default: + break; + } +@@ -393,16 +385,6 @@ static void qca955x_set_speed_sgmii(int + iounmap(base); + } + +-static void qca956x_set_speed_sgmii(int speed) +-{ +- void __iomem *base; +- u32 val = ath79_get_eth_pll(0, speed); +- +- base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); +- __raw_writel(val, base + QCA955X_PLL_ETH_SGMII_CONTROL_REG); +- iounmap(base); +-} +- + static void ath79_set_speed_dummy(int speed) + { + } +@@ -601,12 +583,6 @@ static void __init ath79_init_eth_pll_da + pll_1000 = AR934X_PLL_VAL_1000; + break; + +- case ATH79_SOC_QCA956X: +- pll_10 = QCA956X_PLL_VAL_10; +- pll_100 = QCA956X_PLL_VAL_100; +- pll_1000 = QCA956X_PLL_VAL_1000; +- break; +- + default: + BUG(); + } +@@ -681,7 +657,6 @@ static int __init ath79_setup_phy_if_mod + + case ATH79_SOC_QCA9556: + case ATH79_SOC_QCA9558: +- case ATH79_SOC_QCA956X: + switch (pdata->phy_if_mode) { + case PHY_INTERFACE_MODE_MII: + case PHY_INTERFACE_MODE_RGMII: +@@ -720,7 +695,6 @@ static int __init ath79_setup_phy_if_mod + case ATH79_SOC_AR7241: + case ATH79_SOC_AR9330: + case ATH79_SOC_AR9331: +- case ATH79_SOC_QCA956X: + case ATH79_SOC_TP9343: + pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII; + break; +@@ -1120,43 +1094,6 @@ void __init ath79_register_eth(unsigned + pdata->fifo_cfg3 = 0x01f00140; + break; + +- case ATH79_SOC_QCA956X: +- if (id == 0) { +- pdata->reset_bit = QCA955X_RESET_GE0_MAC | +- QCA955X_RESET_GE0_MDIO; +- +- if (pdata->phy_if_mode == PHY_INTERFACE_MODE_SGMII) +- pdata->set_speed = qca956x_set_speed_sgmii; +- else +- pdata->set_speed = ath79_set_speed_ge0; +- } else { +- pdata->reset_bit = QCA955X_RESET_GE1_MAC | +- QCA955X_RESET_GE1_MDIO; +- +- pdata->set_speed = ath79_set_speed_dummy; +- +- pdata->switch_data = &ath79_switch_data; +- +- pdata->speed = SPEED_1000; +- pdata->duplex = DUPLEX_FULL; +- +- /* reset the built-in switch */ +- ath79_device_reset_set(AR934X_RESET_ETH_SWITCH); +- ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH); +- } +- +- pdata->ddr_flush = ath79_ddr_no_flush; +- pdata->has_gbit = 1; +- pdata->is_ar724x = 1; +- +- if (!pdata->fifo_cfg1) +- pdata->fifo_cfg1 = 0x0010ffff; +- if (!pdata->fifo_cfg2) +- pdata->fifo_cfg2 = 0x015500aa; +- if (!pdata->fifo_cfg3) +- pdata->fifo_cfg3 = 0x01f00140; +- break; +- + default: + BUG(); + } +@@ -1206,11 +1143,6 @@ void __init ath79_register_eth(unsigned + /* don't assign any MDIO device by default */ + break; + +- case ATH79_SOC_QCA956X: +- if (pdata->phy_if_mode != PHY_INTERFACE_MODE_SGMII) +- pdata->mii_bus_dev = &ath79_mdio1_device.dev; +- break; +- + default: + pdata->mii_bus_dev = &ath79_mdio0_device.dev; + break; -- 2.35.1