From: jow Date: Sun, 13 Nov 2011 18:16:07 +0000 (+0000) Subject: [backfire] ar71xx: backport mach-tl-mr3420.c as well X-Git-Url: http://git.ozo.com/?p=openwrt-10.03%2F.git;a=commitdiff_plain;h=150113fb7cc38ec24369944552163a5f76b13d12 [backfire] ar71xx: backport mach-tl-mr3420.c as well git-svn-id: svn://svn.openwrt.org/openwrt/branches/backfire@29032 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-mr3420.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-mr3420.c new file mode 100644 index 000000000..4721d4255 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-mr3420.c @@ -0,0 +1,148 @@ +/* + * TP-LINK TL-MR3420 board support + * + * Copyright (C) 2010 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include + +#include + +#include "machtype.h" +#include "devices.h" +#include "dev-m25p80.h" +#include "dev-ap91-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-usb.h" + +#define TL_MR3420_GPIO_LED_QSS 0 +#define TL_MR3420_GPIO_LED_SYSTEM 1 +#define TL_MR3420_GPIO_LED_3G 8 + +#define TL_MR3420_GPIO_BTN_RESET 11 +#define TL_MR3420_GPIO_BTN_QSS 12 + +#define TL_MR3420_GPIO_USB_POWER 6 + +#define TL_MR3420_BUTTONS_POLL_INTERVAL 20 + +#ifdef CONFIG_MTD_PARTITIONS +static struct mtd_partition tl_mr3420_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "kernel", + .offset = 0x020000, + .size = 0x140000, + }, { + .name = "rootfs", + .offset = 0x160000, + .size = 0x290000, + }, { + .name = "art", + .offset = 0x3f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x020000, + .size = 0x3d0000, + } +}; +#define tl_mr3420_num_partitions ARRAY_SIZE(tl_mr3420_partitions) +#else +#define tl_mr3420_partitions NULL +#define tl_mr3420_num_partitions 0 +#endif /* CONFIG_MTD_PARTITIONS */ + +static struct flash_platform_data tl_mr3420_flash_data = { + .parts = tl_mr3420_partitions, + .nr_parts = tl_mr3420_num_partitions, +}; + +static struct gpio_led tl_mr3420_leds_gpio[] __initdata = { + { + .name = "tl-mr3420:green:system", + .gpio = TL_MR3420_GPIO_LED_SYSTEM, + .active_low = 1, + }, { + .name = "tl-mr3420:green:qss", + .gpio = TL_MR3420_GPIO_LED_QSS, + .active_low = 1, + }, { + .name = "tl-mr3420:green:3g", + .gpio = TL_MR3420_GPIO_LED_3G, + .active_low = 1, + } +}; + +static struct gpio_button tl_mr3420_gpio_buttons[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .threshold = 3, + .gpio = TL_MR3420_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "qss", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .threshold = 3, + .gpio = TL_MR3420_GPIO_BTN_QSS, + .active_low = 1, + } +}; + +static void __init tl_mr3420_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + + /* enable power for the USB port */ + gpio_request(TL_MR3420_GPIO_USB_POWER, "USB power"); + gpio_direction_output(TL_MR3420_GPIO_USB_POWER, 1); + + ar71xx_add_device_m25p80(&tl_mr3420_flash_data); + + ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_mr3420_leds_gpio), + tl_mr3420_leds_gpio); + + ar71xx_add_device_gpio_buttons(-1, TL_MR3420_BUTTONS_POLL_INTERVAL, + ARRAY_SIZE(tl_mr3420_gpio_buttons), + tl_mr3420_gpio_buttons); + + ar71xx_eth1_data.has_ar7240_switch = 1; + ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); + ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); + + /* WAN port */ + ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ar71xx_eth0_data.speed = SPEED_100; + ar71xx_eth0_data.duplex = DUPLEX_FULL; + + /* LAN ports */ + ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ar71xx_eth1_data.speed = SPEED_1000; + ar71xx_eth1_data.duplex = DUPLEX_FULL; + + ar71xx_add_device_mdio(0x0); + ar71xx_add_device_eth(1); + ar71xx_add_device_eth(0); + + ar71xx_add_device_usb(); + + ap91_pci_init(ee, mac); +} +MIPS_MACHINE(AR71XX_MACH_TL_MR3420, "TL-MR3420", "TP-LINK TL-MR3420", + tl_mr3420_setup);