[ar71xx] ag71xx driver: add more register bit definitions

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13387 3c298f89-4303-0410-b956-a3cf2f4a3e73

diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
index d8851160f7fef6ba5b81d5de66d45748a02282fe..cbc6f75e4dbb0d00ae45a7993131fd2e3286b155 100644 (file)
--- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
+++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
@@ -198,12 +198,14 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
 #define AG71XX_REG_INT_ENABLE  0x0198
 #define AG71XX_REG_INT_STATUS  0x019c
 
-#define MAC_CFG1_TXE           BIT(0)
-#define MAC_CFG1_STX           BIT(1)
-#define MAC_CFG1_RXE           BIT(2)
-#define MAC_CFG1_SRX           BIT(3)
-#define MAC_CFG1_LB            BIT(8)
-#define MAC_CFG1_SR            BIT(31)
+#define MAC_CFG1_TXE           BIT(0)  /* Tx Enable */
+#define MAC_CFG1_STX           BIT(1)  /* Synchronize Tx Enable */
+#define MAC_CFG1_RXE           BIT(2)  /* Rx Enable */
+#define MAC_CFG1_SRX           BIT(3)  /* Synchronize Rx Enable */
+#define MAC_CFG1_TFC           BIT(4)  /* Tx Flow Control Enable */
+#define MAC_CFG1_RFC           BIT(5)  /* Rx Flow Control Enable */
+#define MAC_CFG1_LB            BIT(8)  /* Loopback mode */
+#define MAC_CFG1_SR            BIT(31) /* Soft Reset */
 
 #define MAC_CFG2_FDX           BIT(0)
 #define MAC_CFG2_CRC_EN                BIT(1)