add pci latency timer workaround for atheros cards (from #1546)

[openwrt-10.03/.git] / target / linux / brcm47xx-2.6 / files / drivers / ssb / driver_pci / pcicore.c

diff --git a/target/linux/brcm47xx-2.6/files/drivers/ssb/driver_pci/pcicore.c b/target/linux/brcm47xx-2.6/files/drivers/ssb/driver_pci/pcicore.c
index e025834950b4b61361594d09cb675dfb7ec8cb1b..e18e486c01d7da71c1c3af2ff665f813038dd1c7 100644 (file)
--- a/target/linux/brcm47xx-2.6/files/drivers/ssb/driver_pci/pcicore.c
+++ b/target/linux/brcm47xx-2.6/files/drivers/ssb/driver_pci/pcicore.c
@@ -92,6 +92,9 @@ static void __init ssb_fixup_pcibridge(struct pci_dev *dev)
 
        /* Enable PCI bridge BAR1 prefetch and burst */
        pci_write_config_dword(dev, SSB_BAR1_CONTROL, 3);
+
+       /* Make sure our latency is high enough to handle the devices behind us */
+       pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xa8);
 }
 DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_fixup_pcibridge);
 
@@ -162,7 +165,6 @@ static int ssb_extpci_read_config(struct ssb_pcicore *pc,
                goto unmap;
        }
        
-       val = readl(mmio);
        val >>= (8 * (off & 3));
 
        switch (len) {
@@ -210,12 +212,10 @@ static int ssb_extpci_write_config(struct ssb_pcicore *pc,
 
        switch (len) {
        case 1:
-               val = readl(mmio);
                val &= ~(0xFF << (8 * (off & 3)));
                val |= *((const u8 *)buf) << (8 * (off & 3));
                break;
        case 2:
-               val = readl(mmio);
                val &= ~(0xFFFF << (8 * (off & 3)));
                val |= *((const u16 *)buf) << (8 * (off & 3));
                break;
@@ -223,7 +223,7 @@ static int ssb_extpci_write_config(struct ssb_pcicore *pc,
                val = *((const u32 *)buf);
                break;
        }
-       writel(*((const u32 *)buf), mmio);
+       writel(val, mmio);
 
        err = 0;
 unmap: