[backfire] target: remove empty "ifxmips" dir
[openwrt-10.03/.git] / target / linux / ppc40x / patches-2.6.32 / 005-openrb.patch
1 --- /dev/null
2 +++ b/arch/powerpc/boot/cuboot-openrb.c
3 @@ -0,0 +1,94 @@
4 +/*
5 + * Old U-boot compatibility for OpenRB boards
6 + *
7 + * Author: Gabor Juhos <juhosg@openwrt.org>
8 + *         Imre Kaloz <kaloz@openwrt.org>
9 + *
10 + * This program is free software; you can redistribute it and/or modify it
11 + * under the terms of the GNU General Public License version 2 as published
12 + * by the Free Software Foundation.
13 + */
14 +
15 +#include "ops.h"
16 +#include "io.h"
17 +#include "dcr.h"
18 +#include "stdio.h"
19 +#include "4xx.h"
20 +#include "44x.h"
21 +#include "cuboot.h"
22 +
23 +#define TARGET_4xx
24 +#define TARGET_405EP
25 +#include "ppcboot.h"
26 +
27 +static bd_t bd;
28 +
29 +static void fixup_perwe(void)
30 +{
31 +#define DCRN_CPC0_PCI_BASE     0xf9
32 +
33 +       /* Turn on PerWE instead of PCIINT */
34 +       mtdcr(DCRN_CPC0_PCI_BASE,
35 +             mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
36 +
37 +#undef DCRN_CPC0_PCI_BASE
38 +}
39 +
40 +static void fixup_cf_card(void)
41 +{
42 +#define CF_CS0_BASE            0xff100000
43 +#define CF_CS1_BASE            0xff200000
44 +
45 +       /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
46 +       mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
47 +       mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BS_1M |
48 +                                EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
49 +       mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
50 +       mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
51 +
52 +       /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
53 +       mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
54 +       mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BS_1M |
55 +                                EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
56 +       mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
57 +       mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
58 +
59 +#undef CF_CS0_BASE
60 +#undef CF_CS1_BASE
61 +}
62 +
63 +static void fixup_isp116x(void)
64 +{
65 +#define ISP116X_CS_BASE                0xf0000000
66 +
67 +       /* PerCS3 (ISP1160's CS): base 0xf0000000, size 32MB, 16-bit, rw */
68 +       mtdcr(DCRN_EBC0_CFGADDR, EBC_B3CR);
69 +       mtdcr(DCRN_EBC0_CFGDATA, ISP116X_CS_BASE | EBC_BXCR_BS_32M |
70 +                                EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
71 +       mtdcr(DCRN_EBC0_CFGADDR, EBC_B3AP);
72 +       mtdcr(DCRN_EBC0_CFGDATA, 0x03016600);
73 +
74 +#undef ISP116X_CS_BASE
75 +}
76 +
77 +static void openrb_fixups(void)
78 +{
79 +       ibm405ep_fixup_clocks(bd.bi_procfreq / 8);
80 +       ibm4xx_sdram_fixup_memsize();
81 +
82 +       fixup_perwe();
83 +       fixup_cf_card();
84 +       fixup_isp116x();
85 +
86 +       dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
87 +}
88 +
89 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
90 +               unsigned long r6, unsigned long r7)
91 +{
92 +       CUBOOT_INIT();
93 +       platform_ops.fixups = openrb_fixups;
94 +       platform_ops.exit = ibm40x_dbcr_reset;
95 +       fdt_init(_dtb_start);
96 +       serial_console_init();
97 +}
98 --- /dev/null
99 +++ b/arch/powerpc/boot/dts/openrb.dts
100 @@ -0,0 +1,291 @@
101 +/*
102 + * Device Tree Source for OpenRB boards
103 + *
104 + * Copyright 2009 Gabor Juhos <juhosg@openwrt.org>
105 + * Copyright 2009 Imre Kaloz <kaloz@openwrt.org>
106 + *
107 + * Based on walnut.dts
108 + *
109 + * This file is licensed under the terms of the GNU General Public
110 + * License version 2.  This program is licensed "as is" without
111 + * any warranty of any kind, whether express or implied.
112 + */
113 +
114 +/dts-v1/;
115 +
116 +/ {
117 +       #address-cells = <1>;
118 +       #size-cells = <1>;
119 +       model = "openrb";
120 +       compatible = "openrb";
121 +       dcr-parent = <&{/cpus/cpu@0}>;
122 +
123 +       aliases {
124 +               ethernet0 = &EMAC0;
125 +               ethernet1 = &EMAC1;
126 +               serial0 = &UART0;
127 +               serial1 = &UART1;
128 +       };
129 +
130 +       cpus {
131 +               #address-cells = <1>;
132 +               #size-cells = <0>;
133 +
134 +               cpu@0 {
135 +                       device_type = "cpu";
136 +                       model = "PowerPC,405EP";
137 +                       reg = <0x00000000>;
138 +                       clock-frequency = <0>; /* Filled in by zImage */
139 +                       timebase-frequency = <0>; /* Filled in by zImage */
140 +                       i-cache-line-size = <0x20>;
141 +                       d-cache-line-size = <0x20>;
142 +                       i-cache-size = <0x4000>;
143 +                       d-cache-size = <0x4000>;
144 +                       dcr-controller;
145 +                       dcr-access-method = "native";
146 +               };
147 +       };
148 +
149 +       memory {
150 +               device_type = "memory";
151 +               reg = <0x00000000 0x00000000>; /* Filled in by zImage */
152 +       };
153 +
154 +       UIC0: interrupt-controller {
155 +               compatible = "ibm,uic";
156 +               interrupt-controller;
157 +               cell-index = <0>;
158 +               dcr-reg = <0x0c0 0x009>;
159 +               #address-cells = <0>;
160 +               #size-cells = <0>;
161 +               #interrupt-cells = <2>;
162 +       };
163 +
164 +       plb {
165 +               compatible = "ibm,plb3";
166 +               #address-cells = <1>;
167 +               #size-cells = <1>;
168 +               ranges;
169 +               clock-frequency = <0>; /* Filled in by zImage */
170 +
171 +               SDRAM0: memory-controller {
172 +                       compatible = "ibm,sdram-405ep";
173 +                       dcr-reg = <0x010 0x002>;
174 +               };
175 +
176 +               MAL: mcmal {
177 +                       compatible = "ibm,mcmal-405ep", "ibm,mcmal";
178 +                       dcr-reg = <0x180 0x062>;
179 +                       num-tx-chans = <4>;
180 +                       num-rx-chans = <2>;
181 +                       interrupt-parent = <&UIC0>;
182 +                       interrupts = <
183 +                               0xb 0x4 /* TXEOB */
184 +                               0xc 0x4 /* RXEOB */
185 +                               0xa 0x4 /* SERR */
186 +                               0xd 0x4 /* TXDE */
187 +                               0xe 0x4 /* RXDE */>;
188 +               };
189 +
190 +               POB0: opb {
191 +                       compatible = "ibm,opb-405ep", "ibm,opb";
192 +                       #address-cells = <1>;
193 +                       #size-cells = <1>;
194 +                       ranges = <0xef600000 0xef600000 0x00a00000>;
195 +                       dcr-reg = <0x0a0 0x005>;
196 +                       clock-frequency = <0>; /* Filled in by zImage */
197 +
198 +                       UART0: serial@ef600300 {
199 +                               device_type = "serial";
200 +                               compatible = "ns16550";
201 +                               reg = <0xef600300 0x00000008>;
202 +                               virtual-reg = <0xef600300>;
203 +                               clock-frequency = <0>; /* Filled in by zImage */
204 +                               current-speed = <115200>;
205 +                               interrupt-parent = <&UIC0>;
206 +                               interrupts = <0x0 0x4>;
207 +                       };
208 +
209 +                       UART1: serial@ef600400 {
210 +                               device_type = "serial";
211 +                               compatible = "ns16550";
212 +                               reg = <0xef600400 0x00000008>;
213 +                               virtual-reg = <0xef600400>;
214 +                               clock-frequency = <0>; /* Filled in by zImage */
215 +                               current-speed = <115200>;
216 +                               interrupt-parent = <&UIC0>;
217 +                               interrupts = <0x1 0x4>;
218 +                       };
219 +
220 +                       IIC: i2c@ef600500 {
221 +                               compatible = "ibm,iic-405ep", "ibm,iic";
222 +                               #address-cells = <1>;
223 +                               #size-cells = <0>;
224 +                               reg = <0xef600500 0x00000011>;
225 +                               interrupt-parent = <&UIC0>;
226 +                               interrupts = <0x2 0x4>;
227 +
228 +                               eeprom@50 {
229 +                                       compatible = "at24,24c16";
230 +                                       reg = <0x50>;
231 +                               };
232 +                       };
233 +
234 +                       GPIO0: gpio-controller@ef600700 {
235 +                               compatible = "ibm,ppc4xx-gpio";
236 +                               reg = <0xef600700 0x00000020>;
237 +                               #gpio-cells = <2>;
238 +                               gpio-controller;
239 +                       };
240 +
241 +                       EMAC0: ethernet@ef600800 {
242 +                               linux,network-index = <0x0>;
243 +                               device_type = "network";
244 +                               compatible = "ibm,emac-405ep", "ibm,emac";
245 +                               interrupt-parent = <&UIC0>;
246 +                               interrupts = <
247 +                                       0xf 0x4 /* Ethernet */
248 +                                       0x9 0x4 /* Ethernet Wake Up */>;
249 +                               local-mac-address = [000000000000]; /* Filled in by zImage */
250 +                               reg = <0xef600800 0x00000070>;
251 +                               mal-device = <&MAL>;
252 +                               mal-tx-channel = <0>;
253 +                               mal-rx-channel = <0>;
254 +                               cell-index = <0>;
255 +                               max-frame-size = <0x5dc>;
256 +                               rx-fifo-size = <0x1000>;
257 +                               tx-fifo-size = <0x800>;
258 +                               phy-mode = "mii";
259 +                               phy-map = <0x00000000>;
260 +                       };
261 +
262 +                       EMAC1: ethernet@ef600900 {
263 +                               linux,network-index = <0x1>;
264 +                               device_type = "network";
265 +                               compatible = "ibm,emac-405ep", "ibm,emac";
266 +                               interrupt-parent = <&UIC0>;
267 +                               interrupts = <
268 +                                       0x11 0x4 /* Ethernet */
269 +                                       0x09 0x4 /* Ethernet Wake Up */>;
270 +                               local-mac-address = [000000000000]; /* Filled in by zImage */
271 +                               reg = <0xef600900 0x00000070>;
272 +                               mal-device = <&MAL>;
273 +                               mal-tx-channel = <2>;
274 +                               mal-rx-channel = <1>;
275 +                               cell-index = <1>;
276 +                               max-frame-size = <0x5dc>;
277 +                               rx-fifo-size = <0x1000>;
278 +                               tx-fifo-size = <0x800>;
279 +                               mdio-device = <&EMAC0>;
280 +                               phy-mode = "mii";
281 +                               phy-map = <0x00000001>;
282 +                       };
283 +
284 +                       leds {
285 +                               compatible = "gpio-leds";
286 +                               user {
287 +                                       label = "openrb:green:user";
288 +                                       gpios = <&GPIO0 2 1>;
289 +                               };
290 +                       };
291 +               };
292 +
293 +               EBC0: ebc {
294 +                       compatible = "ibm,ebc-405ep", "ibm,ebc";
295 +                       dcr-reg = <0x012 0x002>;
296 +                       #address-cells = <2>;
297 +                       #size-cells = <1>;
298 +                       /* The ranges property is supplied by the bootwrapper
299 +                        * and is based on the firmware's configuration of the
300 +                        * EBC bridge
301 +                        */
302 +                       clock-frequency = <0>; /* Filled in by zImage */
303 +
304 +                       isp116x@f0000000 {
305 +                               compatible = "isp116x-hcd";
306 +                               oc_enable;
307 +                               int_act_high;
308 +                               int_edge_triggered;
309 +                               reg = <0x00000000 0xf0000000 0x00000002 /* data */
310 +                                      0x00000000 0xf1000000 0x00000002 /* addr */ >;
311 +                               interrupt-parent = <&UIC0>;
312 +                               interrupts = <0x1b 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
313 +                       };
314 +
315 +                       cf_card@ff100000 {
316 +                               compatible = "magicbox-cf", "pata-magicbox-cf";
317 +                               reg = <0x00000000 0xff100000 0x00001000
318 +                                      0x00000000 0xff200000 0x00001000>;
319 +                               interrupt-parent = <&UIC0>;
320 +                               interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
321 +                       };
322 +
323 +                       nor_flash@ff800000 {
324 +                               compatible = "cfi-flash";
325 +                               bank-width = <2>;
326 +                               reg = <0x00000000 0xff800000 0x00800000>;
327 +                               #address-cells = <1>;
328 +                               #size-cells = <1>;
329 +                               partition0@0 {
330 +                                       label = "linux";
331 +                                       reg = <0x0 0x140000>;
332 +                               };
333 +                               partition1@120000 {
334 +                                       label = "rootfs";
335 +                                       reg = <0x140000 0x680000>;
336 +                               };
337 +                               partition2@7c0000 {
338 +                                       label = "u-boot";
339 +                                       reg = <0x7c0000 0x30000>;
340 +                                       read-only;
341 +                               };
342 +                               partition3@0 {
343 +                                       label = "firmware";
344 +                                       reg = <0x0 0x7c0000>;
345 +                               };
346 +                       };
347 +               };
348 +
349 +               PCI0: pci@ec000000 {
350 +                       device_type = "pci";
351 +                       #interrupt-cells = <1>;
352 +                       #size-cells = <2>;
353 +                       #address-cells = <3>;
354 +                       compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
355 +                       primary;
356 +                       reg = <0xeec00000 0x00000008    /* Config space access */
357 +                              0xeed80000 0x00000004    /* IACK */
358 +                              0xeed80000 0x00000004    /* Special cycle */
359 +                              0xef480000 0x00000040>;  /* Internal registers */
360 +
361 +                       /* Outbound ranges, one memory and one IO,
362 +                        * later cannot be changed. Chip supports a second
363 +                        * IO range but we don't use it for now
364 +                        */
365 +                       ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
366 +                                 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
367 +
368 +                       /* Inbound 2GB range starting at 0 */
369 +                       dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
370 +
371 +                       interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
372 +                       interrupt-map = <
373 +                               /* IDSEL 1 */
374 +                               0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
375 +
376 +                               /* IDSEL 2 */
377 +                               0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
378 +
379 +                               /* IDSEL 3 */
380 +                               0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
381 +
382 +                               /* IDSEL 4 */
383 +                               0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
384 +                       >;
385 +               };
386 +       };
387 +
388 +       chosen {
389 +               linux,stdout-path = "/plb/opb/serial@ef600300";
390 +       };
391 +};
392 --- a/arch/powerpc/boot/Makefile
393 +++ b/arch/powerpc/boot/Makefile
394 @@ -44,6 +44,7 @@ $(obj)/cuboot-taishan.o: BOOTCFLAGS += -
395  $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=440
396  $(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
397  $(obj)/cuboot-magicbox.o: BOOTCFLAGS += -mcpu=405
398 +$(obj)/cuboot-openrb.o: BOOTCFLAGS += -mcpu=405
399  $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
400  $(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
401  
402 @@ -78,7 +79,7 @@ src-plat := of.c cuboot-52xx.c cuboot-82
403                 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
404                 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
405                 cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \
406 -               cuboot-magicbox.c
407 +               cuboot-magicbox.c cuboot-openrb.c
408  src-boot := $(src-wlib) $(src-plat) empty.c
409  
410  src-boot := $(addprefix $(obj)/, $(src-boot))
411 @@ -197,6 +198,7 @@ image-$(CONFIG_HOTFOOT)                     += cuImage.hot
412  image-$(CONFIG_WALNUT)                 += treeImage.walnut
413  image-$(CONFIG_ACADIA)                 += cuImage.acadia
414  image-$(CONFIG_MAGICBOX)               += cuImage.magicbox
415 +image-$(CONFIG_OPENRB)                 += cuImage.openrb
416  
417  # Board ports in arch/powerpc/platform/44x/Kconfig
418  image-$(CONFIG_EBONY)                  += treeImage.ebony cuImage.ebony
419 --- a/arch/powerpc/platforms/40x/Kconfig
420 +++ b/arch/powerpc/platforms/40x/Kconfig
421 @@ -70,6 +70,16 @@ config MAGICBOX
422         help
423           This option enables support for the Magicbox boards.
424  
425 +config OPENRB
426 +       bool "OpenRB"
427 +       depends on 40x
428 +       default n
429 +       select PPC40x_SIMPLE
430 +       select 405EP
431 +       select PCI
432 +       help
433 +         This option enables support for the OpenRB boards.
434 +
435  config MAKALU
436         bool "Makalu"
437         depends on 40x
438 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c
439 +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
440 @@ -56,7 +56,8 @@ static char *board[] __initdata = {
441         "amcc,kilauea",
442         "amcc,makalu",
443         "est,hotfoot",
444 -       "magicbox"
445 +       "magicbox",
446 +       "openrb"
447  };
448  
449  static int __init ppc40x_probe(void)