[backfire] ar71xx: backport r28295 (#10357)
[openwrt-10.03/.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-dir-825-b1.c
1 /*
2  *  D-Link DIR-825 rev. B1 board support
3  *
4  *  Copyright (C) 2009 Lukas Kuna, Evkanet, s.r.o.
5  *
6  *  based on mach-wndr3700.c
7  *
8  *  This program is free software; you can redistribute it and/or modify it
9  *  under the terms of the GNU General Public License version 2 as published
10  *  by the Free Software Foundation.
11  */
12
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/delay.h>
17 #include <linux/rtl8366.h>
18
19 #include <asm/mach-ar71xx/ar71xx.h>
20
21 #include "machtype.h"
22 #include "devices.h"
23 #include "dev-m25p80.h"
24 #include "dev-ap94-pci.h"
25 #include "dev-gpio-buttons.h"
26 #include "dev-leds-gpio.h"
27 #include "dev-usb.h"
28
29 #define DIR825B1_GPIO_LED_BLUE_USB              0
30 #define DIR825B1_GPIO_LED_ORANGE_POWER          1
31 #define DIR825B1_GPIO_LED_BLUE_POWER            2
32 #define DIR825B1_GPIO_LED_BLUE_POWERSAVE        4
33 #define DIR825B1_GPIO_LED_ORANGE_PLANET         6
34 #define DIR825B1_GPIO_LED_BLUE_PLANET           11
35
36 #define DIR825B1_GPIO_BTN_RESET                 3
37 #define DIR825B1_GPIO_BTN_POWERSAVE             8
38
39 #define DIR825B1_GPIO_RTL8366_SDA               5
40 #define DIR825B1_GPIO_RTL8366_SCK               7
41
42 #define DIR825B1_BUTTONS_POLL_INTERVAL          20
43
44 #define DIR825B1_CAL_LOCATION_0                 0x1f661000
45 #define DIR825B1_CAL_LOCATION_1                 0x1f665000
46
47 #define DIR825B1_MAC_LOCATION_0                 0x1f66ffa0
48 #define DIR825B1_MAC_LOCATION_1                 0x1f66ffb4
49
50 #ifdef CONFIG_MTD_PARTITIONS
51 static struct mtd_partition dir825b1_partitions[] = {
52         {
53                 .name           = "uboot",
54                 .offset         = 0,
55                 .size           = 0x040000,
56                 .mask_flags     = MTD_WRITEABLE,
57         } , {
58                 .name           = "config",
59                 .offset         = 0x040000,
60                 .size           = 0x010000,
61                 .mask_flags     = MTD_WRITEABLE,
62         } , {
63                 .name           = "firmware",
64                 .offset         = 0x050000,
65                 .size           = 0x610000,
66         } , {
67                 .name           = "caldata",
68                 .offset         = 0x660000,
69                 .size           = 0x010000,
70                 .mask_flags     = MTD_WRITEABLE,
71         } , {
72                 .name           = "unknown",
73                 .offset         = 0x670000,
74                 .size           = 0x190000,
75                 .mask_flags     = MTD_WRITEABLE,
76         }
77 };
78 #endif /* CONFIG_MTD_PARTITIONS */
79
80 static struct flash_platform_data dir825b1_flash_data = {
81 #ifdef CONFIG_MTD_PARTITIONS
82         .parts          = dir825b1_partitions,
83         .nr_parts       = ARRAY_SIZE(dir825b1_partitions),
84 #endif
85 };
86
87 static struct gpio_led dir825b1_leds_gpio[] __initdata = {
88         {
89                 .name           = "dir825b1:blue:usb",
90                 .gpio           = DIR825B1_GPIO_LED_BLUE_USB,
91                 .active_low     = 1,
92         }, {
93                 .name           = "dir825b1:orange:power",
94                 .gpio           = DIR825B1_GPIO_LED_ORANGE_POWER,
95                 .active_low     = 1,
96         }, {
97                 .name           = "dir825b1:blue:power",
98                 .gpio           = DIR825B1_GPIO_LED_BLUE_POWER,
99                 .active_low     = 1,
100         }, {
101                 .name           = "dir825b1:blue:powersave",
102                 .gpio           = DIR825B1_GPIO_LED_BLUE_POWERSAVE,
103                 .active_low     = 1,
104         }, {
105                 .name           = "dir825b1:orange:planet",
106                 .gpio           = DIR825B1_GPIO_LED_ORANGE_PLANET,
107                 .active_low     = 1,
108         }, {
109                 .name           = "dir825b1:blue:planet",
110                 .gpio           = DIR825B1_GPIO_LED_BLUE_PLANET,
111                 .active_low     = 1,
112         }
113 };
114
115 static struct gpio_button dir825b1_gpio_buttons[] __initdata = {
116         {
117                 .desc           = "reset",
118                 .type           = EV_KEY,
119                 .code           = BTN_0,
120                 .threshold      = 3,
121                 .gpio           = DIR825B1_GPIO_BTN_RESET,
122                 .active_low     = 1,
123         } , {
124                 .desc           = "powersave",
125                 .type           = EV_KEY,
126                 .code           = BTN_1,
127                 .threshold      = 3,
128                 .gpio           = DIR825B1_GPIO_BTN_POWERSAVE,
129                 .active_low     = 1,
130         }
131 };
132
133 static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = {
134         { .reg = 0x06, .val = 0x0108 },
135 };
136
137 static struct rtl8366_platform_data dir825b1_rtl8366s_data = {
138         .gpio_sda       = DIR825B1_GPIO_RTL8366_SDA,
139         .gpio_sck       = DIR825B1_GPIO_RTL8366_SCK,
140         .num_initvals   = ARRAY_SIZE(dir825b1_rtl8366s_initvals),
141         .initvals       = dir825b1_rtl8366s_initvals,
142 };
143
144 static struct platform_device dir825b1_rtl8366s_device = {
145         .name           = RTL8366S_DRIVER_NAME,
146         .id             = -1,
147         .dev = {
148                 .platform_data  = &dir825b1_rtl8366s_data,
149         }
150 };
151
152 static void dir825b1_read_ascii_mac(u8 *dest, unsigned int src_addr, int off)
153 {
154         int ret;
155         u32 add;
156         u8 *src = (u8 *)KSEG1ADDR(src_addr);
157
158         ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
159                      &dest[0], &dest[1], &dest[2],
160                      &dest[3], &dest[4], &dest[5]);
161
162         if (ret != ETH_ALEN) {
163                 memset(dest, 0, ETH_ALEN);
164                 return;
165         }
166
167         add = (((u32)dest[3]) << 16) + (((u32)dest[4]) << 8) + ((u32)dest[5]);
168         add += off;
169
170         dest[3] = (add >> 16) & 0xFF;
171         dest[4] = (add >> 8) & 0xFF;
172         dest[5] = add & 0xFF;
173 }
174
175 static void __init dir825b1_setup(void)
176 {
177         u8 mac_base[ETH_ALEN], wmac1[ETH_ALEN], wmac2[ETH_ALEN];
178
179         dir825b1_read_ascii_mac(mac_base, DIR825B1_MAC_LOCATION_0, 2);
180         dir825b1_read_ascii_mac(wmac1,    DIR825B1_MAC_LOCATION_0, 0);
181         dir825b1_read_ascii_mac(wmac2,    DIR825B1_MAC_LOCATION_1, 0);
182
183         ar71xx_set_mac_base(mac_base);
184
185         ar71xx_add_device_mdio(0x0);
186
187         ar71xx_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
188         ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
189         ar71xx_eth0_data.speed = SPEED_1000;
190         ar71xx_eth0_data.duplex = DUPLEX_FULL;
191         ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
192
193         ar71xx_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
194         ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
195         ar71xx_eth1_data.phy_mask = 0x10;
196         ar71xx_eth1_pll_data.pll_1000 = 0x11110000;
197
198         ar71xx_add_device_eth(0);
199         ar71xx_add_device_eth(1);
200
201         ar71xx_add_device_m25p80(&dir825b1_flash_data);
202
203         ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
204                                         dir825b1_leds_gpio);
205
206         ar71xx_add_device_gpio_buttons(-1, DIR825B1_BUTTONS_POLL_INTERVAL,
207                                         ARRAY_SIZE(dir825b1_gpio_buttons),
208                                         dir825b1_gpio_buttons);
209
210         ar71xx_add_device_usb();
211
212         platform_device_register(&dir825b1_rtl8366s_device);
213
214         ap94_pci_setup_wmac_led_pin(0, 5);
215         ap94_pci_setup_wmac_led_pin(1, 5);
216
217         ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0), wmac1,
218                       (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1), wmac2);
219 }
220
221 MIPS_MACHINE(AR71XX_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1",
222              dir825b1_setup);