ath9k: add noise floor calibration fix that should improve stability, backport of...
[openwrt-10.03/.git] / package / mac80211 / patches / 300-pending_work.patch
1 --- a/net/wireless/reg.c
2 +++ b/net/wireless/reg.c
3 @@ -1456,7 +1456,8 @@ static void reg_process_hint(struct regu
4          * We only time out user hints, given that they should be the only
5          * source of bogus requests.
6          */
7 -       if (reg_request->initiator == NL80211_REGDOM_SET_BY_USER)
8 +       if (r != -EALREADY &&
9 +           reg_request->initiator == NL80211_REGDOM_SET_BY_USER)
10                 schedule_delayed_work(&reg_timeout, msecs_to_jiffies(3142));
11  }
12  
13 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
14 +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
15 @@ -18,13 +18,13 @@
16  #include "hw-ops.h"
17  #include "ar9003_phy.h"
18  
19 -#define MPASS  3
20  #define MAX_MEASUREMENT        8
21 -#define MAX_DIFFERENCE 10
22 +#define MAX_MAG_DELTA  11
23 +#define MAX_PHS_DELTA  10
24  
25  struct coeff {
26 -       int mag_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT][MPASS];
27 -       int phs_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT][MPASS];
28 +       int mag_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT];
29 +       int phs_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT];
30         int iqc_coeff[2];
31  };
32  
33 @@ -608,36 +608,48 @@ static bool ar9003_hw_calc_iq_corr(struc
34         return true;
35  }
36  
37 -static bool ar9003_hw_compute_closest_pass_and_avg(int *mp_coeff, int *mp_avg)
38 +static void ar9003_hw_detect_outlier(int *mp_coeff, int nmeasurement,
39 +                                    int max_delta)
40  {
41 -       int diff[MPASS];
42 -
43 -       diff[0] = abs(mp_coeff[0] - mp_coeff[1]);
44 -       diff[1] = abs(mp_coeff[1] - mp_coeff[2]);
45 -       diff[2] = abs(mp_coeff[2] - mp_coeff[0]);
46 -
47 -       if (diff[0] > MAX_DIFFERENCE &&
48 -           diff[1] > MAX_DIFFERENCE &&
49 -           diff[2] > MAX_DIFFERENCE)
50 -               return false;
51 -
52 -       if (diff[0] <= diff[1] && diff[0] <= diff[2])
53 -               *mp_avg = (mp_coeff[0] + mp_coeff[1]) / 2;
54 -       else if (diff[1] <= diff[2])
55 -               *mp_avg = (mp_coeff[1] + mp_coeff[2]) / 2;
56 -       else
57 -               *mp_avg = (mp_coeff[2] + mp_coeff[0]) / 2;
58 +       int mp_max = -64, max_idx = 0;
59 +       int mp_min = 63, min_idx = 0;
60 +       int mp_avg = 0, i, outlier_idx = 0;
61 +
62 +       /* find min/max mismatch across all calibrated gains */
63 +       for (i = 0; i < nmeasurement; i++) {
64 +               mp_avg += mp_coeff[i];
65 +               if (mp_coeff[i] > mp_max) {
66 +                       mp_max = mp_coeff[i];
67 +                       max_idx = i;
68 +               } else if (mp_coeff[i] < mp_min) {
69 +                       mp_min = mp_coeff[i];
70 +                       min_idx = i;
71 +               }
72 +       }
73  
74 -       return true;
75 +       /* find average (exclude max abs value) */
76 +       for (i = 0; i < nmeasurement; i++) {
77 +               if ((abs(mp_coeff[i]) < abs(mp_max)) ||
78 +                   (abs(mp_coeff[i]) < abs(mp_min)))
79 +                       mp_avg += mp_coeff[i];
80 +       }
81 +       mp_avg /= (nmeasurement - 1);
82 +
83 +       /* detect outlier */
84 +       if (abs(mp_max - mp_min) > max_delta) {
85 +               if (abs(mp_max - mp_avg) > abs(mp_min - mp_avg))
86 +                       outlier_idx = max_idx;
87 +               else
88 +                       outlier_idx = min_idx;
89 +       }
90 +       mp_coeff[outlier_idx] = mp_avg;
91  }
92  
93  static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah,
94                                                  u8 num_chains,
95                                                  struct coeff *coeff)
96  {
97 -       struct ath_common *common = ath9k_hw_common(ah);
98         int i, im, nmeasurement;
99 -       int magnitude, phase;
100         u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS];
101  
102         memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff));
103 @@ -657,37 +669,28 @@ static void ar9003_hw_tx_iqcal_load_avg_
104  
105         /* Load the average of 2 passes */
106         for (i = 0; i < num_chains; i++) {
107 -               if (AR_SREV_9485(ah))
108 -                       nmeasurement = REG_READ_FIELD(ah,
109 -                                       AR_PHY_TX_IQCAL_STATUS_B0_9485,
110 -                                       AR_PHY_CALIBRATED_GAINS_0);
111 -               else
112 -                       nmeasurement = REG_READ_FIELD(ah,
113 -                                       AR_PHY_TX_IQCAL_STATUS_B0,
114 -                                       AR_PHY_CALIBRATED_GAINS_0);
115 +               nmeasurement = REG_READ_FIELD(ah,
116 +                               AR_PHY_TX_IQCAL_STATUS_B0,
117 +                               AR_PHY_CALIBRATED_GAINS_0);
118  
119                 if (nmeasurement > MAX_MEASUREMENT)
120                         nmeasurement = MAX_MEASUREMENT;
121  
122 -               for (im = 0; im < nmeasurement; im++) {
123 -                       /*
124 -                        * Determine which 2 passes are closest and compute avg
125 -                        * magnitude
126 -                        */
127 -                       if (!ar9003_hw_compute_closest_pass_and_avg(coeff->mag_coeff[i][im],
128 -                                                                   &magnitude))
129 -                               goto disable_txiqcal;
130 +               /* detect outlier only if nmeasurement > 1 */
131 +               if (nmeasurement > 1) {
132 +                       /* Detect magnitude outlier */
133 +                       ar9003_hw_detect_outlier(coeff->mag_coeff[i],
134 +                                       nmeasurement, MAX_MAG_DELTA);
135 +
136 +                       /* Detect phase outlier */
137 +                       ar9003_hw_detect_outlier(coeff->phs_coeff[i],
138 +                                       nmeasurement, MAX_PHS_DELTA);
139 +               }
140  
141 -                       /*
142 -                        * Determine which 2 passes are closest and compute avg
143 -                        * phase
144 -                        */
145 -                       if (!ar9003_hw_compute_closest_pass_and_avg(coeff->phs_coeff[i][im],
146 -                                                                   &phase))
147 -                               goto disable_txiqcal;
148 +               for (im = 0; im < nmeasurement; im++) {
149  
150 -                       coeff->iqc_coeff[0] = (magnitude & 0x7f) |
151 -                                             ((phase & 0x7f) << 7);
152 +                       coeff->iqc_coeff[0] = (coeff->mag_coeff[i][im] & 0x7f) |
153 +                               ((coeff->phs_coeff[i][im] & 0x7f) << 7);
154  
155                         if ((im % 2) == 0)
156                                 REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
157 @@ -707,141 +710,37 @@ static void ar9003_hw_tx_iqcal_load_avg_
158  
159         return;
160  
161 -disable_txiqcal:
162 -       REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
163 -                     AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x0);
164 -       REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
165 -                     AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x0);
166 -
167 -       ath_dbg(common, ATH_DBG_CALIBRATE, "TX IQ Cal disabled\n");
168  }
169  
170 -static void ar9003_hw_tx_iq_cal(struct ath_hw *ah)
171 +static bool ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
172  {
173         struct ath_common *common = ath9k_hw_common(ah);
174 -       static const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
175 -               AR_PHY_TX_IQCAL_STATUS_B0,
176 -               AR_PHY_TX_IQCAL_STATUS_B1,
177 -               AR_PHY_TX_IQCAL_STATUS_B2,
178 -       };
179 -       static const u32 chan_info_tab[] = {
180 -               AR_PHY_CHAN_INFO_TAB_0,
181 -               AR_PHY_CHAN_INFO_TAB_1,
182 -               AR_PHY_CHAN_INFO_TAB_2,
183 -       };
184 -       struct coeff coeff;
185 -       s32 iq_res[6];
186 -       s32 i, j, ip, im, nmeasurement;
187 -       u8 nchains = get_streams(common->tx_chainmask);
188 -
189 -       for (ip = 0; ip < MPASS; ip++) {
190 -               REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
191 -                             AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
192 -                             DELPT);
193 -               REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
194 -                             AR_PHY_TX_IQCAL_START_DO_CAL,
195 -                             AR_PHY_TX_IQCAL_START_DO_CAL);
196 -
197 -               if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
198 -                                  AR_PHY_TX_IQCAL_START_DO_CAL,
199 -                                  0, AH_WAIT_TIMEOUT)) {
200 -                       ath_dbg(common, ATH_DBG_CALIBRATE,
201 -                               "Tx IQ Cal not complete.\n");
202 -                       goto TX_IQ_CAL_FAILED;
203 -               }
204 -
205 -               nmeasurement = REG_READ_FIELD(ah, AR_PHY_TX_IQCAL_STATUS_B0,
206 -                                             AR_PHY_CALIBRATED_GAINS_0);
207 -                       if (nmeasurement > MAX_MEASUREMENT)
208 -                               nmeasurement = MAX_MEASUREMENT;
209 -
210 -               for (i = 0; i < nchains; i++) {
211 -                       ath_dbg(common, ATH_DBG_CALIBRATE,
212 -                               "Doing Tx IQ Cal for chain %d.\n", i);
213 -                       for (im = 0; im < nmeasurement; im++) {
214 -                               if (REG_READ(ah, txiqcal_status[i]) &
215 -                                            AR_PHY_TX_IQCAL_STATUS_FAILED) {
216 -                                       ath_dbg(common, ATH_DBG_CALIBRATE,
217 -                                               "Tx IQ Cal failed for chain %d.\n", i);
218 -                                       goto TX_IQ_CAL_FAILED;
219 -                               }
220 -
221 -                               for (j = 0; j < 3; j++) {
222 -                                       u8 idx = 2 * j,
223 -                                          offset = 4 * (3 * im + j);
224 -
225 -                                       REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
226 -                                                     AR_PHY_CHAN_INFO_TAB_S2_READ,
227 -                                                     0);
228 -
229 -                                       /* 32 bits */
230 -                                       iq_res[idx] = REG_READ(ah,
231 -                                                       chan_info_tab[i] +
232 -                                                       offset);
233 -
234 -                                       REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
235 -                                                     AR_PHY_CHAN_INFO_TAB_S2_READ,
236 -                                                     1);
237 -
238 -                                       /* 16 bits */
239 -                                       iq_res[idx+1] = 0xffff & REG_READ(ah,
240 -                                                               chan_info_tab[i] +
241 -                                                               offset);
242 -
243 -                                       ath_dbg(common, ATH_DBG_CALIBRATE,
244 -                                               "IQ RES[%d]=0x%x IQ_RES[%d]=0x%x\n",
245 -                                               idx, iq_res[idx], idx+1, iq_res[idx+1]);
246 -                               }
247 -
248 -                               if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
249 -                                                           coeff.iqc_coeff)) {
250 -                                       ath_dbg(common, ATH_DBG_CALIBRATE,
251 -                                               "Failed in calculation of IQ correction.\n");
252 -                                       goto TX_IQ_CAL_FAILED;
253 -                               }
254 -                               coeff.mag_coeff[i][im][ip] =
255 -                                               coeff.iqc_coeff[0] & 0x7f;
256 -                               coeff.phs_coeff[i][im][ip] =
257 -                                               (coeff.iqc_coeff[0] >> 7) & 0x7f;
258 -
259 -                               if (coeff.mag_coeff[i][im][ip] > 63)
260 -                                       coeff.mag_coeff[i][im][ip] -= 128;
261 -                               if (coeff.phs_coeff[i][im][ip] > 63)
262 -                                       coeff.phs_coeff[i][im][ip] -= 128;
263 -
264 -                       }
265 -               }
266 -       }
267 -
268 -       ar9003_hw_tx_iqcal_load_avg_2_passes(ah, nchains, &coeff);
269 -
270 -       return;
271 -
272 -TX_IQ_CAL_FAILED:
273 -       ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n");
274 -}
275 -
276 -static void ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
277 -{
278         u8 tx_gain_forced;
279  
280 -       REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1_9485,
281 -                     AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT, DELPT);
282         tx_gain_forced = REG_READ_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
283                                         AR_PHY_TXGAIN_FORCE);
284         if (tx_gain_forced)
285                 REG_RMW_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
286                               AR_PHY_TXGAIN_FORCE, 0);
287  
288 -       REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START_9485,
289 -                     AR_PHY_TX_IQCAL_START_DO_CAL_9485, 1);
290 +       REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
291 +                     AR_PHY_TX_IQCAL_START_DO_CAL, 1);
292 +
293 +       if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
294 +                       AR_PHY_TX_IQCAL_START_DO_CAL, 0,
295 +                       AH_WAIT_TIMEOUT)) {
296 +               ath_dbg(common, ATH_DBG_CALIBRATE,
297 +                       "Tx IQ Cal is not completed.\n");
298 +               return false;
299 +       }
300 +       return true;
301  }
302  
303  static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah)
304  {
305         struct ath_common *common = ath9k_hw_common(ah);
306         const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
307 -               AR_PHY_TX_IQCAL_STATUS_B0_9485,
308 +               AR_PHY_TX_IQCAL_STATUS_B0,
309                 AR_PHY_TX_IQCAL_STATUS_B1,
310                 AR_PHY_TX_IQCAL_STATUS_B2,
311         };
312 @@ -853,7 +752,7 @@ static void ar9003_hw_tx_iq_cal_post_pro
313         struct coeff coeff;
314         s32 iq_res[6];
315         u8 num_chains = 0;
316 -       int i, ip, im, j;
317 +       int i, im, j;
318         int nmeasurement;
319  
320         for (i = 0; i < AR9300_MAX_CHAINS; i++) {
321 @@ -861,71 +760,69 @@ static void ar9003_hw_tx_iq_cal_post_pro
322                         num_chains++;
323         }
324  
325 -       for (ip = 0; ip < MPASS; ip++) {
326 -               for (i = 0; i < num_chains; i++) {
327 -                       nmeasurement = REG_READ_FIELD(ah,
328 -                                       AR_PHY_TX_IQCAL_STATUS_B0_9485,
329 -                                       AR_PHY_CALIBRATED_GAINS_0);
330 -                       if (nmeasurement > MAX_MEASUREMENT)
331 -                               nmeasurement = MAX_MEASUREMENT;
332 +       for (i = 0; i < num_chains; i++) {
333 +               nmeasurement = REG_READ_FIELD(ah,
334 +                               AR_PHY_TX_IQCAL_STATUS_B0,
335 +                               AR_PHY_CALIBRATED_GAINS_0);
336 +               if (nmeasurement > MAX_MEASUREMENT)
337 +                       nmeasurement = MAX_MEASUREMENT;
338 +
339 +               for (im = 0; im < nmeasurement; im++) {
340 +                       ath_dbg(common, ATH_DBG_CALIBRATE,
341 +                               "Doing Tx IQ Cal for chain %d.\n", i);
342  
343 -                       for (im = 0; im < nmeasurement; im++) {
344 +                       if (REG_READ(ah, txiqcal_status[i]) &
345 +                                       AR_PHY_TX_IQCAL_STATUS_FAILED) {
346                                 ath_dbg(common, ATH_DBG_CALIBRATE,
347 -                                       "Doing Tx IQ Cal for chain %d.\n", i);
348 -
349 -                               if (REG_READ(ah, txiqcal_status[i]) &
350 -                                   AR_PHY_TX_IQCAL_STATUS_FAILED) {
351 -                                       ath_dbg(common, ATH_DBG_CALIBRATE,
352                                         "Tx IQ Cal failed for chain %d.\n", i);
353 -                                       goto tx_iqcal_fail;
354 -                               }
355 +                               goto tx_iqcal_fail;
356 +                       }
357  
358 -                               for (j = 0; j < 3; j++) {
359 -                                       u32 idx = 2 * j, offset = 4 * (3 * im + j);
360 +                       for (j = 0; j < 3; j++) {
361 +                               u32 idx = 2 * j, offset = 4 * (3 * im + j);
362  
363 -                                       REG_RMW_FIELD(ah,
364 +                               REG_RMW_FIELD(ah,
365                                                 AR_PHY_CHAN_INFO_MEMORY,
366                                                 AR_PHY_CHAN_INFO_TAB_S2_READ,
367                                                 0);
368  
369 -                                       /* 32 bits */
370 -                                       iq_res[idx] = REG_READ(ah,
371 -                                                       chan_info_tab[i] +
372 -                                                       offset);
373 +                               /* 32 bits */
374 +                               iq_res[idx] = REG_READ(ah,
375 +                                               chan_info_tab[i] +
376 +                                               offset);
377  
378 -                                       REG_RMW_FIELD(ah,
379 +                               REG_RMW_FIELD(ah,
380                                                 AR_PHY_CHAN_INFO_MEMORY,
381                                                 AR_PHY_CHAN_INFO_TAB_S2_READ,
382                                                 1);
383  
384 -                                       /* 16 bits */
385 -                                       iq_res[idx + 1] = 0xffff & REG_READ(ah,
386 -                                                         chan_info_tab[i] + offset);
387 -
388 -                                       ath_dbg(common, ATH_DBG_CALIBRATE,
389 -                                               "IQ RES[%d]=0x%x"
390 -                                               "IQ_RES[%d]=0x%x\n",
391 -                                               idx, iq_res[idx], idx + 1,
392 -                                               iq_res[idx + 1]);
393 -                               }
394 +                               /* 16 bits */
395 +                               iq_res[idx + 1] = 0xffff & REG_READ(ah,
396 +                                               chan_info_tab[i] + offset);
397  
398 -                               if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
399 -                                                           coeff.iqc_coeff)) {
400 -                                       ath_dbg(common, ATH_DBG_CALIBRATE,
401 -                                        "Failed in calculation of IQ correction.\n");
402 -                                       goto tx_iqcal_fail;
403 -                               }
404 +                               ath_dbg(common, ATH_DBG_CALIBRATE,
405 +                                       "IQ RES[%d]=0x%x"
406 +                                       "IQ_RES[%d]=0x%x\n",
407 +                                       idx, iq_res[idx], idx + 1,
408 +                                       iq_res[idx + 1]);
409 +                       }
410  
411 -                               coeff.mag_coeff[i][im][ip] =
412 -                                               coeff.iqc_coeff[0] & 0x7f;
413 -                               coeff.phs_coeff[i][im][ip] =
414 -                                               (coeff.iqc_coeff[0] >> 7) & 0x7f;
415 -
416 -                               if (coeff.mag_coeff[i][im][ip] > 63)
417 -                                       coeff.mag_coeff[i][im][ip] -= 128;
418 -                               if (coeff.phs_coeff[i][im][ip] > 63)
419 -                                       coeff.phs_coeff[i][im][ip] -= 128;
420 +                       if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
421 +                                               coeff.iqc_coeff)) {
422 +                               ath_dbg(common, ATH_DBG_CALIBRATE,
423 +                                       "Failed in calculation of \
424 +                                       IQ correction.\n");
425 +                               goto tx_iqcal_fail;
426                         }
427 +
428 +                       coeff.mag_coeff[i][im] = coeff.iqc_coeff[0] & 0x7f;
429 +                       coeff.phs_coeff[i][im] =
430 +                               (coeff.iqc_coeff[0] >> 7) & 0x7f;
431 +
432 +                       if (coeff.mag_coeff[i][im] > 63)
433 +                               coeff.mag_coeff[i][im] -= 128;
434 +                       if (coeff.phs_coeff[i][im] > 63)
435 +                               coeff.phs_coeff[i][im] -= 128;
436                 }
437         }
438         ar9003_hw_tx_iqcal_load_avg_2_passes(ah, num_chains, &coeff);
439 @@ -941,6 +838,7 @@ static bool ar9003_hw_init_cal(struct at
440  {
441         struct ath_common *common = ath9k_hw_common(ah);
442         int val;
443 +       bool txiqcal_done = false;
444  
445         val = REG_READ(ah, AR_ENT_OTP);
446         ath_dbg(common, ATH_DBG_CALIBRATE, "ath9k: AR_ENT_OTP 0x%x\n", val);
447 @@ -957,14 +855,22 @@ static bool ar9003_hw_init_cal(struct at
448                 ar9003_hw_set_chain_masks(ah, 0x7, 0x7);
449  
450         /* Do Tx IQ Calibration */
451 -       if (AR_SREV_9485(ah))
452 -               ar9003_hw_tx_iq_cal_run(ah);
453 -       else
454 -               ar9003_hw_tx_iq_cal(ah);
455 +       REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
456 +                     AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
457 +                     DELPT);
458  
459 -       REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
460 -       udelay(5);
461 -       REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
462 +       /*
463 +        * For AR9485 or later chips, TxIQ cal runs as part of
464 +        * AGC calibration
465 +        */
466 +       if (AR_SREV_9485_OR_LATER(ah))
467 +               txiqcal_done = true;
468 +       else {
469 +               txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
470 +               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
471 +               udelay(5);
472 +               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
473 +       }
474  
475         /* Calibrate the AGC */
476         REG_WRITE(ah, AR_PHY_AGC_CONTROL,
477 @@ -979,7 +885,7 @@ static bool ar9003_hw_init_cal(struct at
478                 return false;
479         }
480  
481 -       if (AR_SREV_9485(ah))
482 +       if (txiqcal_done)
483                 ar9003_hw_tx_iq_cal_post_proc(ah);
484  
485         /* Revert chainmasks to their original values before NF cal */
486 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
487 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
488 @@ -548,15 +548,12 @@
489  
490  #define AR_PHY_TXGAIN_TABLE      (AR_SM_BASE + 0x300)
491  
492 -#define AR_PHY_TX_IQCAL_START_9485             (AR_SM_BASE + 0x3c4)
493 -#define AR_PHY_TX_IQCAL_START_DO_CAL_9485      0x80000000
494 -#define AR_PHY_TX_IQCAL_START_DO_CAL_9485_S    31
495 -#define AR_PHY_TX_IQCAL_CONTROL_1_9485         (AR_SM_BASE + 0x3c8)
496 -#define AR_PHY_TX_IQCAL_STATUS_B0_9485         (AR_SM_BASE + 0x3f0)
497 -
498 -#define AR_PHY_TX_IQCAL_CONTROL_1   (AR_SM_BASE + 0x448)
499 -#define AR_PHY_TX_IQCAL_START       (AR_SM_BASE + 0x440)
500 -#define AR_PHY_TX_IQCAL_STATUS_B0   (AR_SM_BASE + 0x48c)
501 +#define AR_PHY_TX_IQCAL_CONTROL_1   (AR_SM_BASE + AR_SREV_9485(ah) ? \
502 +                                                0x3c8 : 0x448)
503 +#define AR_PHY_TX_IQCAL_START       (AR_SM_BASE + AR_SREV_9485(ah) ? \
504 +                                                0x3c4 : 0x440)
505 +#define AR_PHY_TX_IQCAL_STATUS_B0   (AR_SM_BASE + AR_SREV_9485(ah) ? \
506 +                                                0x3f0 : 0x48c)
507  #define AR_PHY_TX_IQCAL_CORR_COEFF_B0(_i)    (AR_SM_BASE + \
508                                              (AR_SREV_9485(ah) ? \
509                                               0x3d0 : 0x450) + ((_i) << 2))
510 @@ -758,10 +755,10 @@
511  #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT   0x01000000
512  #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_S 24
513  #define AR_PHY_CHANNEL_STATUS_RX_CLEAR      0x00000004
514 -#define AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT             0x01fc0000
515 -#define AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT_S                   18
516 -#define AR_PHY_TX_IQCAL_START_DO_CAL        0x00000001
517 -#define AR_PHY_TX_IQCAL_START_DO_CAL_S      0
518 +#define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT             0x01fc0000
519 +#define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT_S                   18
520 +#define AR_PHY_TX_IQCAL_START_DO_CAL       0x00000001
521 +#define AR_PHY_TX_IQCAL_START_DO_CAL_S     0
522  
523  #define AR_PHY_TX_IQCAL_STATUS_FAILED    0x00000001
524  #define AR_PHY_CALIBRATED_GAINS_0       0x3e
525 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
526 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
527 @@ -453,6 +453,7 @@ void ath9k_btcoex_timer_pause(struct ath
528  
529  #define ATH_LED_PIN_DEF                1
530  #define ATH_LED_PIN_9287               8
531 +#define ATH_LED_PIN_9300               10
532  #define ATH_LED_PIN_9485               6
533  
534  #ifdef CONFIG_MAC80211_LEDS
535 --- a/drivers/net/wireless/ath/ath9k/gpio.c
536 +++ b/drivers/net/wireless/ath/ath9k/gpio.c
537 @@ -46,6 +46,8 @@ void ath_init_leds(struct ath_softc *sc)
538                         sc->sc_ah->led_pin = ATH_LED_PIN_9287;
539                 else if (AR_SREV_9485(sc->sc_ah))
540                         sc->sc_ah->led_pin = ATH_LED_PIN_9485;
541 +               else if (AR_SREV_9300(sc->sc_ah))
542 +                       sc->sc_ah->led_pin = ATH_LED_PIN_9300;
543                 else
544                         sc->sc_ah->led_pin = ATH_LED_PIN_DEF;
545         }
546 --- a/drivers/net/wireless/ath/ath9k/reg.h
547 +++ b/drivers/net/wireless/ath/ath9k/reg.h
548 @@ -868,6 +868,8 @@
549  #define AR_SREV_9485_11(_ah) \
550         (AR_SREV_9485(_ah) && \
551          ((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_11))
552 +#define AR_SREV_9485_OR_LATER(_ah) \
553 +       (((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9485))
554  
555  #define AR_SREV_9285E_20(_ah) \
556      (AR_SREV_9285_12_OR_LATER(_ah) && \
557 --- a/net/mac80211/rx.c
558 +++ b/net/mac80211/rx.c
559 @@ -652,7 +652,7 @@ static void ieee80211_sta_reorder_releas
560   set_release_timer:
561  
562                 mod_timer(&tid_agg_rx->reorder_timer,
563 -                         tid_agg_rx->reorder_time[j] +
564 +                         tid_agg_rx->reorder_time[j] + 1 +
565                           HT_RX_REORDER_BUF_TIMEOUT);
566         } else {
567                 del_timer(&tid_agg_rx->reorder_timer);
568 --- a/drivers/net/wireless/ath/ath9k/calib.c
569 +++ b/drivers/net/wireless/ath/ath9k/calib.c
570 @@ -69,15 +69,21 @@ static void ath9k_hw_update_nfcal_hist_b
571                                               int16_t *nfarray)
572  {
573         struct ath_common *common = ath9k_hw_common(ah);
574 +       struct ieee80211_conf *conf = &common->hw->conf;
575         struct ath_nf_limits *limit;
576         struct ath9k_nfcal_hist *h;
577         bool high_nf_mid = false;
578 +       u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
579         int i;
580  
581         h = cal->nfCalHist;
582         limit = ath9k_hw_get_nf_limits(ah, ah->curchan);
583  
584         for (i = 0; i < NUM_NF_READINGS; i++) {
585 +               if (!(chainmask & (1 << i)) ||
586 +                   ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf)))
587 +                       continue;
588 +
589                 h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
590  
591                 if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX)
592 @@ -225,6 +231,7 @@ void ath9k_hw_loadnf(struct ath_hw *ah, 
593         int32_t val;
594         u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
595         struct ath_common *common = ath9k_hw_common(ah);
596 +       struct ieee80211_conf *conf = &common->hw->conf;
597         s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
598  
599         if (ah->caldata)
600 @@ -234,6 +241,9 @@ void ath9k_hw_loadnf(struct ath_hw *ah, 
601                 if (chainmask & (1 << i)) {
602                         s16 nfval;
603  
604 +                       if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
605 +                               continue;
606 +
607                         if (h)
608                                 nfval = h[i].privNF;
609                         else
610 @@ -293,6 +303,9 @@ void ath9k_hw_loadnf(struct ath_hw *ah, 
611         ENABLE_REGWRITE_BUFFER(ah);
612         for (i = 0; i < NUM_NF_READINGS; i++) {
613                 if (chainmask & (1 << i)) {
614 +                       if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
615 +                               continue;
616 +
617                         val = REG_READ(ah, ah->nf_regs[i]);
618                         val &= 0xFFFFFE00;
619                         val |= (((u32) (-50) << 1) & 0x1ff);