From 5bba2679d438a7a101edae866033decddc380b16 Mon Sep 17 00:00:00 2001 From: Alexandros Couloumbis Date: Tue, 14 Apr 2020 20:13:15 +0300 Subject: [PATCH] ar71xx updates --- package/utils/reghack/Makefile | 40 ++ package/utils/reghack/src/Makefile | 42 ++ package/utils/reghack/src/reghack.c | 442 ++++++++++++++++++ target/linux/ar71xx/config-4.9 | 71 ++- .../files/arch/mips/ath79/Kconfig.openwrt | 2 - .../703-MIPS-ath79-add-rb711.patch | 50 ++ 6 files changed, 626 insertions(+), 21 deletions(-) create mode 100644 package/utils/reghack/Makefile create mode 100644 package/utils/reghack/src/Makefile create mode 100644 package/utils/reghack/src/reghack.c create mode 100644 target/linux/ar71xx/patches-4.9/703-MIPS-ath79-add-rb711.patch diff --git a/package/utils/reghack/Makefile b/package/utils/reghack/Makefile new file mode 100644 index 0000000000..0fd5b85866 --- /dev/null +++ b/package/utils/reghack/Makefile @@ -0,0 +1,40 @@ +# +# Copyright (C) 2009 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=reghack +PKG_RELEASE:=$(LINUX_VERSION) + +include $(INCLUDE_DIR)/package.mk + +define Package/reghack + SECTION:=utils + CATEGORY:=Utilities + DEPENDS:= + TITLE:=reghack utility + VERSION:=$(LINUX_VERSION)-$(PKG_RELEASE) + URL:=http://www.kernel.org + MAINTAINER:= +endef + +define Package/reghack/description + reghack utility. +endef + +define Build/Compile + $(TARGET_CC) $(TARGET_CFLAGS) -o $(PKG_BUILD_DIR)/reghack \ + $(PKG_BUILD_DIR)/reghack.c +endef + +define Package/reghack/install + $(INSTALL_DIR) $(1)/sbin + $(INSTALL_BIN) $(PKG_BUILD_DIR)/reghack $(1)/sbin/ +endef + +$(eval $(call BuildPackage,reghack)) diff --git a/package/utils/reghack/src/Makefile b/package/utils/reghack/src/Makefile new file mode 100644 index 0000000000..9c15b1c902 --- /dev/null +++ b/package/utils/reghack/src/Makefile @@ -0,0 +1,42 @@ +INSTALLDIR = /sbin + +HOSTOS := $(shell uname -s) + +CC = gcc +#CFLAGS = -std=gnu99 -O3 -Wall -Wextra +INSTFLAGS = -m 0755 + +ifeq ($(HOSTOS), Linux) +INSTFLAGS += -D +endif + +all: build + +build: +ifeq ($(HOSTOS), Linux) + $(CC) $(CFLAGS) -o reghack reghack.c $(LFLAGS) +endif + + +install: build +ifeq ($(HOSTOS), Linux) + install $(INSTFLAGS) reghack $(INSTALLDIR)/reghack +endif + +ifeq ($(HOSTOS), Linux) + rm -f reghack +endif + rm -f *.o *~ + + +clean: +ifeq ($(HOSTOS), Linux) + rm -f reghack +endif + rm -f *.o *~ + + +uninstall: +ifeq ($(HOSTOS), Linux) + rm -f $(INSTALLDIR)/reghack +endif diff --git a/package/utils/reghack/src/reghack.c b/package/utils/reghack/src/reghack.c new file mode 100644 index 0000000000..d9f10fb825 --- /dev/null +++ b/package/utils/reghack/src/reghack.c @@ -0,0 +1,442 @@ +/* + * reghack - Utility to binary-patch the embedded mac80211 regulatory rules. + * + * Copyright (C) 2012-2014 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +static int need_byteswap = 0; + +enum nl80211_dfs_regions { + NL80211_DFS_UNSET = 0, + NL80211_DFS_FCC = 1 +}; + +struct ieee80211_freq_range { + uint32_t start_freq_khz; + uint32_t end_freq_khz; + uint32_t max_bandwidth_khz; +}; + +struct ieee80211_power_rule { + uint32_t max_antenna_gain; + uint32_t max_eirp; +}; + +struct ieee80211_reg_rule { + struct ieee80211_freq_range freq_range; + struct ieee80211_power_rule power_rule; + uint32_t flags; + uint32_t dfs_cac_ms; +}; + +struct ieee80211_regdomain { + uint32_t n_reg_rules; + char alpha2[2]; + enum nl80211_dfs_regions dfs_region; + struct ieee80211_reg_rule reg_rules[1]; +}; + +#define MHZ_TO_KHZ(freq) ((freq) * 1000) +#define KHZ_TO_MHZ(freq) ((freq) / 1000) +#define DBI_TO_MBI(gain) ((gain) * 100) +#define MBI_TO_DBI(gain) ((gain) / 100) +#define DBM_TO_MBM(gain) ((gain) * 100) +#define MBM_TO_DBM(gain) ((gain) / 100) + +#define REG_RULE(start, end, bw, gain, eirp, reg_flags) \ +{ \ + .freq_range.start_freq_khz = MHZ_TO_KHZ(start), \ + .freq_range.end_freq_khz = MHZ_TO_KHZ(end), \ + .freq_range.max_bandwidth_khz = MHZ_TO_KHZ(bw), \ + .power_rule.max_antenna_gain = DBI_TO_MBI(gain),\ + .power_rule.max_eirp = DBM_TO_MBM(eirp), \ + .flags = reg_flags, \ + .dfs_cac_ms = 0, \ +} + +#define REG_MATCH(code, num, dfs, rule) \ +{ \ + .alpha2 = code, \ + .dfs_region = dfs, \ + .n_reg_rules = num, \ + .reg_rules = { \ + rule \ + } \ +} + + +struct search_regdomain { + const char *desc; + struct ieee80211_regdomain reg; +}; + +static const struct search_regdomain search_regdomains[] = { + /* cfg80211.ko matches */ + { + .desc = "core world5 regdomain in cfg80211/reg.o", + .reg = REG_MATCH("00", 5, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 6, 20, 0)) + }, { + .desc = "core world6 regdomain in cfg80211/reg.o", + .reg = REG_MATCH("00", 6, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 6, 20, 0)) + }, { + .desc = "embedded 00 regdomain in cfg80211/regdb.o", + .reg = REG_MATCH("00", 5, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 3, 20, 0)) + }, { + .desc = "embedded 00 regdomain in cfg80211/regdb.o", + .reg = REG_MATCH("00", 6, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 3, 20, 0)) + }, { + .desc = "embedded 00 regdomain in cfg80211/regdb.o", + .reg = REG_MATCH("00", 8, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 0, 20, 0)) + }, { + .desc = "embedded US regdomain in cfg80211/regdb.o", + .reg = REG_MATCH("US", 6, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 3, 27, 0)) + }, { + .desc = "embedded US regdomain in cfg80211/regdb.o", + .reg = REG_MATCH("US", 7, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 3, 27, 0)) + }, { + .desc = "embedded US regdomain in cfg80211/regdb.o", + .reg = REG_MATCH("US", 7, NL80211_DFS_FCC, REG_RULE(2402, 2472, 40, 3, 27, 0)) + }, { + /* March 2016 addition */ + .desc = "core world8(?) regdomain in cfg80211/reg.o (new rule)", + .reg = REG_MATCH("00", 8, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 6, 20, 0)) + }, + + /* regdb.txt matches */ + { + .desc = "embedded 00 regdomain in cfg80211/regdb.o", + .reg = REG_MATCH("00", 6, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 0, 20, 0)) + }, { + .desc = "embedded US regdomain in cfg80211/regdb.o", + .reg = REG_MATCH("US", 5, NL80211_DFS_FCC, REG_RULE(2402, 2472, 40, 0, 30, 0)) + }, { + /* March 2016 addition */ + .desc = "embedded US regdomain in cfg80211/regdb.o (new rule)", + .reg = REG_MATCH("US", 6, NL80211_DFS_FCC, REG_RULE(2402, 2472, 40, 0, 30, 0)) + }, + + /* ath.ko matches */ + { + .desc = "ath world regdomain with 3 rules in ath/regd.o", + .reg = REG_MATCH("99", 3, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 0, 20, 0)) + }, { + .desc = "ath world regdomain with 4 rules in ath/regd.o", + .reg = REG_MATCH("99", 4, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 0, 20, 0)) + }, { + .desc = "ath world regdomain with 5 rules in ath/regd.o", + .reg = REG_MATCH("99", 5, NL80211_DFS_UNSET, REG_RULE(2402, 2472, 40, 0, 20, 0)) + } +}; + + +struct search_insn { + const char *desc; + const uint16_t machine; + const uint32_t search; + const uint32_t replace; + const uint32_t mask; + int step; +}; + +static const struct search_insn search_insns[] = { + /* radar frequency check */ + { + .desc = "ath_is_radar_freq() MIPS opcode in ath/regd.o", + .machine = 0x0008, /* MIPS */ + .search = 0x2400eb74, /* addiu rX, rY, -5260 */ + .replace = 0x24000000, /* addiu rX, rY, 0 */ + .mask = 0xfc00ffff, + .step = 4 + }, + { + .desc = "ath_is_radar_freq() PPC opcode in ath/regd.o", + .machine = 0x0014, /* PPC */ + .search = 0x3800eb74, /* addi rX, rY, -5260 */ + .replace = 0x38000000, /* addi rX, rY, 0 */ + .mask = 0xfc00ffff, + .step = 4 + }, + { + .desc = "ath_is_radar_freq() x86 opcode in ath/regd.o (1/2)", + .machine = 0x0003, /* x86 */ + .search = 0x0000148c, /* 5260 */ + .replace = 0x00000000, /* 0 */ + .mask = 0x0000ffff, + .step = 1 + }, + { + .desc = "ath_is_radar_freq() x86 opcode in ath/regd.o (2/2)", + .machine = 0x0003, /* x86 */ + .search = 0xffffeb74, /* -5260 */ + .replace = 0x00000000, /* 0 */ + .mask = 0xffffffff, + .step = 1 + }, + { + .desc = "ath_is_radar_freq() x86-64 opcode in ath/regd.o (1/2)", + .machine = 0x003e, /* x86-64 */ + .search = 0x0000148c, /* 5260 */ + .replace = 0x00000000, /* 0 */ + .mask = 0x0000ffff, + .step = 1 + }, + { + .desc = "ath_is_radar_freq() x86-64 opcode in ath/regd.o (2/2)", + .machine = 0x003e, /* x86-64 */ + .search = 0xffffeb74, /* -5260 */ + .replace = 0x00000000, /* 0 */ + .mask = 0xffffffff, + .step = 1 + } +}; + + +static void check_endianess(unsigned char *elf_hdr) +{ + int self_is_be = (htonl(42) == 42); + int elf_is_be = (elf_hdr[5] == 2); + + if (self_is_be != elf_is_be) + { + need_byteswap = 1; + printf("Byte swapping needed (utility %s endian, module %s endian)\n", + self_is_be ? "big" : "low", + elf_is_be ? "big" : "low"); + } +} + +static void bswap_rule(struct ieee80211_reg_rule *r) +{ + r->freq_range.start_freq_khz = bswap_32(r->freq_range.start_freq_khz); + r->freq_range.end_freq_khz = bswap_32(r->freq_range.end_freq_khz); + r->freq_range.max_bandwidth_khz = bswap_32(r->freq_range.max_bandwidth_khz); + + r->power_rule.max_antenna_gain = bswap_32(r->power_rule.max_antenna_gain); + r->power_rule.max_eirp = bswap_32(r->power_rule.max_eirp); + + r->flags = bswap_32(r->flags); +} + +static int patch_regdomain(struct ieee80211_regdomain *pos, + const struct ieee80211_regdomain *comp) +{ + /* This is what the rules above get replaced with */ + struct ieee80211_reg_rule r2 = REG_RULE(2400, 2494, 40, 0, 33, 0); + struct ieee80211_reg_rule r5 = REG_RULE(4910, 5860, 160, 0, 33, 0); + struct ieee80211_regdomain pattern = *comp; + + if (need_byteswap) + { + bswap_rule(&pattern.reg_rules[0]); + pattern.dfs_region = bswap_32(pattern.dfs_region); + pattern.n_reg_rules = bswap_32(pattern.n_reg_rules); + } + + if (!memcmp(pos, &pattern, sizeof(pattern))) + { + pos->reg_rules[0] = r2; + pos->reg_rules[1] = r5; + pos->n_reg_rules = 2; + pos->dfs_region = 0; + + if (need_byteswap) + { + bswap_rule(&pos->reg_rules[0]); + bswap_rule(&pos->reg_rules[1]); + pos->n_reg_rules = bswap_32(pos->n_reg_rules); + } + + return 0; + } + + return 1; +} + + +static uint16_t check_ath_ko(unsigned char *elf_hdr, const char *filename) +{ + uint16_t type = *(uint16_t *)(elf_hdr + 18); + const char *file = strrchr(filename, '/'); + + if (!file) + file = filename; + else + file++; + + if (need_byteswap) + type = bswap_16(type); + + if (!strcmp(file, "ath.ko")) + return type; + + return 0; +} + +static int patch_insn(uint32_t *pos, const struct search_insn *insn) +{ + uint32_t cmp = need_byteswap ? bswap_32(*pos) : *pos; + + if ((cmp & insn->mask) == insn->search) + { + *pos = need_byteswap ? bswap_32(insn->replace | (cmp & ~insn->mask)) + : insn->replace | (cmp & ~insn->mask); + + return 0; + } + + return 1; +} + + +static int tryopen(const char *path, int *size, void **map) +{ + int fd; + struct stat s; + + if (stat(path, &s)) + { + perror("stat()"); + return -1; + } + + if ((fd = open(path, O_RDWR)) == -1) + { + perror("open()"); + return -2; + } + + *size = s.st_size; + *map = mmap(NULL, *size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0); + + if (*map == MAP_FAILED) + { + close(fd); + perror("mmap()"); + return -3; + } + + return fd; +} + +int main(int argc, char **argv) +{ + int i, j, fd, sz; + int found = 0; + uint16_t ath_ko_machine = 0; + + void *map; + char *tmp = NULL, cmd[PATH_MAX * 2 + 4]; + + if (argc < 2) + { + printf("Usage: %s module.ko\n", argv[0]); + exit(1); + } + + fd = tryopen(argv[1], &sz, &map); + + if (fd == -3) + { + printf("Memory mapping failed (missing fs support?), retrying from tmpfs\n"); + + tmp = tmpnam(NULL); + + sprintf(cmd, "cp %s %s", argv[1], tmp); + system(cmd); + + fd = tryopen(tmp, &sz, &map); + } + + if (fd < 0) + { + if (tmp) + unlink(tmp); + + exit(1); + } + + check_endianess(map); + ath_ko_machine = check_ath_ko(map, argv[1]); + + if (ath_ko_machine) + { + for (j = 0; j < sizeof(search_insns)/sizeof(search_insns[0]); j++) + { + if (search_insns[j].machine != ath_ko_machine) + continue; + + for (i = 0; i < (sz - sizeof(search_regdomains[0].reg)); i += search_insns[j].step) + { + if (!patch_insn(map + i, &search_insns[j])) + { + printf("Patching @ 0x%08x: %s\n", i, search_insns[j].desc); + found = 1; + } + } + } + } + + for (i = 0; i < (sz - sizeof(search_regdomains[0].reg)); i += sizeof(uint32_t)) + { + for (j = 0; j < (sizeof(search_regdomains)/sizeof(search_regdomains[0])); j++) + { + if (!patch_regdomain(map + i, &search_regdomains[j].reg)) + { + printf("Patching @ 0x%08x: %s\n", i, search_regdomains[j].desc); + found = 1; + } + } + } + + if (munmap(map, sz)) + { + perror("munmap()"); + exit(1); + } + + if (tmp) + { + if (found) + { + sprintf(cmd, "cp %s %s", tmp, argv[1]); + system(cmd); + } + + unlink(tmp); + } + + close(fd); + + if (!found) + { + printf("Unable to find regulatory rules (already patched?)\n"); + exit(1); + } + + return 0; +} diff --git a/target/linux/ar71xx/config-4.9 b/target/linux/ar71xx/config-4.9 index 8d25692ec8..909d2125d4 100644 --- a/target/linux/ar71xx/config-4.9 +++ b/target/linux/ar71xx/config-4.9 @@ -1,9 +1,8 @@ CONFIG_AG71XX=y CONFIG_AG71XX_AR8216_SUPPORT=y # CONFIG_AG71XX_DEBUG is not set -# CONFIG_AG71XX_DEBUG_FS is not set +# CONFIG_ALLOW_DEV_COREDUMP is not set CONFIG_AR8216_PHY=y -CONFIG_AR8216_PHY_LEDS=y CONFIG_ARCH_BINFMT_ELF_STATE=y CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_ARCH_DISCARD_MEMBLOCK=y @@ -22,11 +21,11 @@ CONFIG_AT803X_PHY=y CONFIG_ATH79=y # CONFIG_ATH79_DEV_AP9X_PCI is not set # CONFIG_ATH79_DEV_DSA is not set -# CONFIG_ATH79_DEV_ETH is not set -# CONFIG_ATH79_DEV_GPIO_BUTTONS is not set +CONFIG_ATH79_DEV_ETH=y +CONFIG_ATH79_DEV_GPIO_BUTTONS=y # CONFIG_ATH79_DEV_LEDS_GPIO is not set -# CONFIG_ATH79_DEV_M25P80 is not set -# CONFIG_ATH79_DEV_SPI is not set +CONFIG_ATH79_DEV_M25P80=y +CONFIG_ATH79_DEV_SPI=y # CONFIG_ATH79_DEV_USB is not set # CONFIG_ATH79_MACH_A60 is not set # CONFIG_ATH79_MACH_ALFA_AP120C is not set @@ -242,7 +241,7 @@ CONFIG_ATH79=y # CONFIG_ATH79_MACH_TL_WR942N_V1 is not set # CONFIG_ATH79_MACH_TS_D084 is not set # CONFIG_ATH79_MACH_TUBE2H is not set -# CONFIG_ATH79_MACH_UBNT is not set +CONFIG_ATH79_MACH_UBNT=y # CONFIG_ATH79_MACH_UBNT_UNIFIAC is not set # CONFIG_ATH79_MACH_UBNT_XM is not set # CONFIG_ATH79_MACH_WAM250 is not set @@ -282,6 +281,11 @@ CONFIG_ATH79=y # CONFIG_ATH79_PCI_ATH9K_FIXUP is not set # CONFIG_ATH79_ROUTERBOOT is not set CONFIG_ATH79_WDT=y +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_BLK_MQ_PCI=y +CONFIG_BUILD_BIN2C=y +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_CEVT_R4K=y CONFIG_CLKDEV_LOOKUP=y CONFIG_CLONE_BACKWARDS=y @@ -289,6 +293,7 @@ CONFIG_CMDLINE="rootfstype=squashfs noinitrd" CONFIG_CMDLINE_BOOL=y # CONFIG_CMDLINE_OVERRIDE is not set CONFIG_COMMON_CLK=y +CONFIG_COMPAT_BRK=y CONFIG_CPU_BIG_ENDIAN=y CONFIG_CPU_GENERIC_DUMP_TLB=y CONFIG_CPU_HAS_PREFETCH=y @@ -303,11 +308,13 @@ CONFIG_CPU_R4K_FPU=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_CPU_SUPPORTS_MSA=y +# CONFIG_CRASHLOG is not set CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_WORKQUEUE=y CONFIG_CSRC_R4K=y CONFIG_DMA_NONCOHERENT=y CONFIG_EARLY_PRINTK=y +# CONFIG_EFI_PARTITION is not set CONFIG_ETHERNET_PACKET_MANGLE=y CONFIG_FIXED_PHY=y CONFIG_GENERIC_ATOMIC64=y @@ -370,22 +377,23 @@ CONFIG_HAVE_PERF_EVENTS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HW_HAS_PCI=y CONFIG_HZ_PERIODIC=y CONFIG_I2C=y CONFIG_I2C_ALGOBIT=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_GPIO=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y CONFIG_IMAGE_CMDLINE_HACK=y -CONFIG_INITRAMFS_ROOT_GID=0 -CONFIG_INITRAMFS_ROOT_UID=0 -CONFIG_INITRAMFS_SOURCE="../../root" CONFIG_INTEL_XWAY_PHY=y CONFIG_IP17XX_PHY=y +# CONFIG_IP_MULTICAST is not set CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y -CONFIG_LEDS_GPIO=y +# CONFIG_ISDN is not set CONFIG_MARVELL_PHY=y CONFIG_MDIO_BITBANG=y CONFIG_MDIO_BOARDINFO=y @@ -427,15 +435,39 @@ CONFIG_MTD_SPLIT_WRGG_FW=y CONFIG_MTD_TPLINK_PARTS=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_PER_CPU_KM=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_MV88E6060=y -CONFIG_NET_DSA_MV88E6063=y -CONFIG_NET_DSA_TAG_TRAILER=y -CONFIG_NET_SWITCHDEV=y +# CONFIG_NETWORK_FILESYSTEMS is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +# CONFIG_NEW_LEDS is not set CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y # CONFIG_NO_IOPORT_MAP is not set # CONFIG_OF is not set +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PCI=y # CONFIG_PCI_AR724X is not set +CONFIG_PCI_DOMAINS=y CONFIG_PCI_DRIVERS_LEGACY=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 @@ -452,7 +484,7 @@ CONFIG_RTL8367_PHY=y # CONFIG_SERIAL_8250_FSL is not set CONFIG_SERIAL_8250_NR_UARTS=1 CONFIG_SERIAL_8250_RUNTIME_UARTS=1 -# CONFIG_SOC_AR71XX is not set +CONFIG_SOC_AR71XX=y # CONFIG_SOC_AR724X is not set # CONFIG_SOC_AR913X is not set # CONFIG_SOC_AR933X is not set @@ -468,8 +500,9 @@ CONFIG_SPI_MASTER=y # CONFIG_SPI_RB4XX is not set # CONFIG_SPI_VSC7385 is not set CONFIG_SRCU=y +# CONFIG_STAGING is not set +# CONFIG_SWAP is not set CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_LEDS=y CONFIG_SWPHY=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_SYS_HAS_CPU_MIPS32_R2=y @@ -481,4 +514,4 @@ CONFIG_SYS_SUPPORTS_MIPS16=y CONFIG_SYS_SUPPORTS_ZBOOT=y CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_USB_SUPPORT=y +# CONFIG_VLAN_8021Q is not set diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt index f60825a6dd..bc76b78f92 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt +++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt @@ -2128,9 +2128,7 @@ config ATH79_MACH_UBNT select SOC_AR71XX select ATH79_DEV_ETH select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO select ATH79_DEV_M25P80 - select ATH79_DEV_USB config ATH79_MACH_UBNT_UNIFIAC bool "Ubiquiti UniFi AC (LITE/LR/MESH/PRO) support" diff --git a/target/linux/ar71xx/patches-4.9/703-MIPS-ath79-add-rb711.patch b/target/linux/ar71xx/patches-4.9/703-MIPS-ath79-add-rb711.patch new file mode 100644 index 0000000000..864ae010f2 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/703-MIPS-ath79-add-rb711.patch @@ -0,0 +1,50 @@ +--- a/arch/mips/ath79/prom.c ++++ b/arch/mips/ath79/prom.c +@@ -169,6 +169,7 @@ void __init prom_init(void) + strstr(arcs_cmdline, "board=2011L") || + strstr(arcs_cmdline, "board=2011r") || + strstr(arcs_cmdline, "board=711Gr100") || ++ strstr(arcs_cmdline, "board=711") || + strstr(arcs_cmdline, "board=911L") || + strstr(arcs_cmdline, "board=922gs")) + ath79_prom_append_cmdline("console", "ttyS0,115200"); +--- a/arch/mips/ath79/mach-rb750.c ++++ b/arch/mips/ath79/mach-rb750.c +@@ -347,3 +347,27 @@ static void __init rb751g_setup(void) + + MIPS_MACHINE(ATH79_MACH_RB_751G, "751g", "MikroTik RouterBOARD 751G", + rb751g_setup); ++ ++static void __init rb711_setup(void) ++{ ++ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ rb750_nand_data.nce_line = RB750_NAND_NCE; ++ rb750_nand_data.enable_pins = rb750_nand_enable_pins; ++ rb750_nand_data.disable_pins = rb750_nand_disable_pins; ++ rb750_nand_data.latch_change = rb750_latch_change; ++ platform_device_register(&rb750_nand_device); ++ ++ rb751_wlan_setup(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_711, "711", "MikroTik RouterBOARD 711", ++ rb711_setup); +--- a/arch/mips/ath79/machtypes.h ++++ b/arch/mips/ath79/machtypes.h +@@ -208,6 +208,7 @@ enum ath79_mach_type { + ATH79_MACH_RB_493, /* Mikrotik RouterBOARD 493/493AH */ + ATH79_MACH_RB_493G, /* Mikrotik RouterBOARD 493G */ + ATH79_MACH_RB_711GR100, /* Mikrotik RouterBOARD 911/912 boards */ ++ ATH79_MACH_RB_711, /* MikroTik RouterBOARD 711 */ + ATH79_MACH_RB_750, /* MikroTik RouterBOARD 750 */ + ATH79_MACH_RB_750G_R3, /* MikroTik RouterBOARD 750GL */ + ATH79_MACH_RB_750UPR2, /* MikroTik RouterBOARD 750UP r2 */ -- 2.35.1