X-Git-Url: http://git.ozo.com/?a=blobdiff_plain;f=packages%2Flang%2Ftcl%2Fpatches%2F200-fix_mips_build.patch;fp=packages%2Flang%2Ftcl%2Fpatches%2F200-fix_mips_build.patch;h=48485ca6ef5018457a98f70e7a7f5ca09429f63b;hb=c1c94620ebf47c0a0f9e1d1a12ff1e9d83b5b312;hp=0000000000000000000000000000000000000000;hpb=ecab1f5bd82201477a9cd0c6ad712085ecef5866;p=librewrt%2F.git

diff --git a/packages/lang/tcl/patches/200-fix_mips_build.patch b/packages/lang/tcl/patches/200-fix_mips_build.patch
new file mode 100644
index 0000000..48485ca
--- /dev/null
+++ b/packages/lang/tcl/patches/200-fix_mips_build.patch
@@ -0,0 +1,20 @@
+--- a/generic/tclStrToD.c
++++ b/generic/tclStrToD.c
+@@ -73,7 +73,7 @@ typedef unsigned int fpu_control_t __att
+  * MIPS floating-point units need special settings in control registers
+  * to use gradual underflow as we expect.
+  */
+-#if defined(__mips)
++#if defined(__sgi) && defined(_COMPILER_VERSION)
+ #include <sys/fpu.h>
+ #endif
+ /*
+@@ -2166,7 +2166,7 @@ TclInitDoubleConversion(void)
+     } bitwhack;
+ #endif
+ 
+-#if defined(__mips)
++#if defined(__sgi) && defined(_COMPILER_VERSION)
+     union fpc_csr mipsCR;
+ 
+     mipsCR.fc_word = get_fpc_csr();