projects
/
openwrt-10.03
/
.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
[ar71xx] fix the PCI byte lane enable generation code, based on a patch by Chris...
[openwrt-10.03/.git]
/
target
/
linux
/
ar71xx
/
files
/
arch
/
mips
/
pci
/
pci-ar71xx.c
diff --git
a/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
b/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
index e3e80a9014517aab271de79053e26fc25359e858..f27c171a6323ec25cf1e2528607abf7b3d1f724d 100644
(file)
--- a/
target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
+++ b/
target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
@@
-59,17
+59,18
@@
static inline void ar71xx_pcicfg_wr(unsigned int reg, u32 val)
/* Byte lane enable bits */
static u8 ble_table[4][4] = {
/* Byte lane enable bits */
static u8 ble_table[4][4] = {
- {0x
f, 0xe, 0xd, 0xc
},
- {0x
c, 0x9, 0x3, 0x1
},
- {0x
0, 0x0, 0x0, 0x0
},
- {0x
0, 0x0, 0x0, 0x0
},
+ {0x
0, 0xf, 0xf, 0xf
},
+ {0x
e, 0xd, 0xb, 0x7
},
+ {0x
c, 0xf, 0x3, 0xf
},
+ {0x
f, 0xf, 0xf, 0xf
},
};
static inline u32 ar71xx_pci_get_ble(int where, int size, int local)
{
u32 t;
};
static inline u32 ar71xx_pci_get_ble(int where, int size, int local)
{
u32 t;
- t = ble_table[size][where & 3];
+ t = ble_table[size & 3][where & 3];
+ BUG_ON(t == 0xf);
t <<= (local) ? 20 : 4;
return t;
}
t <<= (local) ? 20 : 4;
return t;
}