--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1542,7 +1542,16 @@ void __cpuinit per_cpu_trap_init(void)
 	 */
 	if (cpu_has_mips_r2) {
 		cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
+		if (!cp0_compare_irq)
+			cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
+
 		cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
+		if (!cp0_perfcount_irq)
+			cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
+
+		if (arch_fixup_c0_irqs)
+			arch_fixup_c0_irqs();
+
 		if (cp0_perfcount_irq == cp0_compare_irq)
 			cp0_perfcount_irq = -1;
 	} else {
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -157,8 +157,10 @@ extern void free_irqno(unsigned int irq)
  * IE7.  Since R2 their number has to be read from the c0_intctl register.
  */
 #define CP0_LEGACY_COMPARE_IRQ 7
+#define CP0_LEGACY_PERFCNT_IRQ 7
 
 extern int cp0_compare_irq;
 extern int cp0_perfcount_irq;
+extern void __weak arch_fixup_c0_irqs(void);
 
 #endif /* _ASM_IRQ_H */